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Date:   Tue, 22 Jan 2019 09:57:17 -0800
From:   Tony Lindgren <tony@...mide.com>
To:     linux-kernel@...r.kernel.org
Cc:     linux-omap@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        Bartosz Golaszewski <bgolaszewski@...libre.com>,
        Daniel Lezcano <daniel.lezcano@...aro.org>,
        "H . Nikolaus Schaller" <hns@...delico.com>,
        Keerthy <j-keerthy@...com>,
        Ladislav Michl <ladis@...ux-mips.org>,
        Pavel Machek <pavel@....cz>,
        Sebastian Reichel <sre@...nel.org>,
        Tero Kristo <t-kristo@...com>,
        Thierry Reding <thierry.reding@...il.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Andy Shevchenko <andy.shevchenko@...il.com>
Subject: [PATCH 3/3] ARM: dts: Configure clock parent for pwm vibra

Commit 84badc5ec5fc ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc") moved some omap4 timers to probe with ti-sysc
interconnect target module. Turns out this broke pwm-omap-dmtimer
for reparenting of the timer clock.

With ti-sysc, we can now configure the clock sources in the dts with
assigned-clocks and assigned-clock-parents.

Fixes: 84badc5ec5fc ("ARM: dts: omap4: Move l4 child devices to probe
them with ti-sysc")
Cc: Bartosz Golaszewski <bgolaszewski@...libre.com>
Cc: Daniel Lezcano <daniel.lezcano@...aro.org>
Cc: H. Nikolaus Schaller <hns@...delico.com>
Cc: Keerthy <j-keerthy@...com>
Cc: Ladislav Michl <ladis@...ux-mips.org>
Cc: Pavel Machek <pavel@....cz>
Cc: Sebastian Reichel <sre@...nel.org>
Cc: Tero Kristo <t-kristo@...com>
Cc: Thierry Reding <thierry.reding@...il.com>
Cc: Thomas Gleixner <tglx@...utronix.de>
Reported-by: H. Nikolaus Schaller <hns@...delico.com>
Signed-off-by: Tony Lindgren <tony@...mide.com>
---
 arch/arm/boot/dts/omap4-droid4-xt894.dts | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm/boot/dts/omap4-droid4-xt894.dts b/arch/arm/boot/dts/omap4-droid4-xt894.dts
--- a/arch/arm/boot/dts/omap4-droid4-xt894.dts
+++ b/arch/arm/boot/dts/omap4-droid4-xt894.dts
@@ -644,6 +644,17 @@
 	};
 };
 
+/* Configure pwm clock source for timers 8 & 9 */
+&timer8 {
+	assigned-clocks = <&abe_clkctrl OMAP4_TIMER8_CLKCTRL 24>;
+	assigned-clock-parents = <&sys_clkin_ck>;
+};
+
+&timer9 {
+	assigned-clocks = <&l4_per_clkctrl OMAP4_TIMER9_CLKCTRL 24>;
+	assigned-clock-parents = <&sys_clkin_ck>;
+};
+
 /*
  * As uart1 is wired to mdm6600 with rts and cts, we can use the cts pin for
  * uart1 wakeirq.
-- 
2.20.1

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