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Message-ID: <3cca35a9-c71c-a100-b29d-31ba0d1d10b1@amd.com>
Date: Thu, 24 Jan 2019 12:31:33 +0000
From: "Koenig, Christian" <Christian.Koenig@....com>
To: Ard Biesheuvel <ard.biesheuvel@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: "linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"Deucher, Alexander" <Alexander.Deucher@....com>,
"Zhou, David(ChunMing)" <David1.Zhou@....com>,
"Huang, Ray" <Ray.Huang@....com>,
"Zhang, Jerry" <Jerry.Zhang@....com>,
"Daenzer, Michel" <Michel.Daenzer@....com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
Maxime Ripard <maxime.ripard@...tlin.com>,
Sean Paul <sean@...rly.run>,
Michael Ellerman <mpe@...erman.id.au>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Will Deacon <will.deacon@....com>,
Christoph Hellwig <hch@...radead.org>,
Robin Murphy <robin.murphy@....com>,
amd-gfx list <amd-gfx@...ts.freedesktop.org>,
dri-devel <dri-devel@...ts.freedesktop.org>,
Carsten Haitzler <Carsten.Haitzler@....com>
Subject: Re: [PATCH] drm: enable uncached DMA optimization for ARM and arm64
Am 24.01.19 um 13:06 schrieb Ard Biesheuvel:
> The DRM driver stack is designed to work with cache coherent devices
> only, but permits an optimization to be enabled in some cases, where
> for some buffers, both the CPU and the GPU use uncached mappings,
> removing the need for DMA snooping and allocation in the CPU caches.
>
> The use of uncached GPU mappings relies on the correct implementation
> of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
> will use cached mappings nonetheless. On x86 platforms, this does not
> seem to matter, as uncached CPU mappings will snoop the caches in any
> case. However, on ARM and arm64, enabling this optimization on a
> platform where NoSnoop is ignored results in loss of coherency, which
> breaks correct operation of the device. Since we have no way of
> detecting whether NoSnoop works or not, just disable this
> optimization entirely for ARM and arm64.
>
> Cc: Christian Koenig <christian.koenig@....com>
> Cc: Alex Deucher <alexander.deucher@....com>
> Cc: David Zhou <David1.Zhou@....com>
> Cc: Huang Rui <ray.huang@....com>
> Cc: Junwei Zhang <Jerry.Zhang@....com>
> Cc: Michel Daenzer <michel.daenzer@....com>
> Cc: David Airlie <airlied@...ux.ie>
> Cc: Daniel Vetter <daniel@...ll.ch>
> Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>
> Cc: Maxime Ripard <maxime.ripard@...tlin.com>
> Cc: Sean Paul <sean@...rly.run>
> Cc: Michael Ellerman <mpe@...erman.id.au>
> Cc: Benjamin Herrenschmidt <benh@...nel.crashing.org>
> Cc: Will Deacon <will.deacon@....com>
> Cc: Christoph Hellwig <hch@...radead.org>
> Cc: Robin Murphy <robin.murphy@....com>
> Cc: amd-gfx list <amd-gfx@...ts.freedesktop.org>
> Cc: dri-devel <dri-devel@...ts.freedesktop.org>
> Reported-by: Carsten Haitzler <Carsten.Haitzler@....com>
> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@...aro.org>
The subject line should probably read "disable uncached...".
With that fixed the patch is Reviewed-by: Christian König
<christian.koenig@....com>.
Regards,
Christian.
> ---
> include/drm/drm_cache.h | 18 ++++++++++++++++++
> 1 file changed, 18 insertions(+)
>
> diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
> index bfe1639df02d..97fc498dc767 100644
> --- a/include/drm/drm_cache.h
> +++ b/include/drm/drm_cache.h
> @@ -47,6 +47,24 @@ static inline bool drm_arch_can_wc_memory(void)
> return false;
> #elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
> return false;
> +#elif defined(CONFIG_ARM) || defined(CONFIG_ARM64)
> + /*
> + * The DRM driver stack is designed to work with cache coherent devices
> + * only, but permits an optimization to be enabled in some cases, where
> + * for some buffers, both the CPU and the GPU use uncached mappings,
> + * removing the need for DMA snooping and allocation in the CPU caches.
> + *
> + * The use of uncached GPU mappings relies on the correct implementation
> + * of the PCIe NoSnoop TLP attribute by the platform, otherwise the GPU
> + * will use cached mappings nonetheless. On x86 platforms, this does not
> + * seem to matter, as uncached CPU mappings will snoop the caches in any
> + * case. However, on ARM and arm64, enabling this optimization on a
> + * platform where NoSnoop is ignored results in loss of coherency, which
> + * breaks correct operation of the device. Since we have no way of
> + * detecting whether NoSnoop works or not, just disable this
> + * optimization entirely for ARM and arm64.
> + */
> + return false;
> #else
> return true;
> #endif
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