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Message-Id: <20190124184313.30193-1-jagan@amarulasolutions.com>
Date: Fri, 25 Jan 2019 00:13:12 +0530
From: Jagan Teki <jagan@...rulasolutions.com>
To: Thierry Reding <thierry.reding@...il.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>,
Sam Ravnborg <sam@...nborg.org>
Cc: Michael Trimarchi <michael@...rulasolutions.com>,
dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
linux-amarula@...rulasolutions.com,
Jagan Teki <jagan@...rulasolutions.com>
Subject: [PATCH v4 1/2] dt-bindings: panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel
Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel.
Add dt-bingings for it.
Signed-off-by: Jagan Teki <jagan@...rulasolutions.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
Changes for v4, v3:
- none
Changes for v2:
- new patch, derived from another dsi series
.../display/panel/feiyang,fy07024di26a30d.txt | 20 +++++++++++++++++++
1 file changed, 20 insertions(+)
create mode 100644 Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
diff --git a/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
new file mode 100644
index 000000000000..82caa7b65ae8
--- /dev/null
+++ b/Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
@@ -0,0 +1,20 @@
+Feiyang FY07024DI26A30-D 7" MIPI-DSI LCD Panel
+
+Required properties:
+- compatible: must be "feiyang,fy07024di26a30d"
+- reg: DSI virtual channel used by that screen
+- avdd-supply: analog regulator dc1 switch
+- dvdd-supply: 3v3 digital regulator
+- reset-gpios: a GPIO phandle for the reset pin
+
+Optional properties:
+- backlight: phandle for the backlight control.
+
+panel@0 {
+ compatible = "feiyang,fy07024di26a30d";
+ reg = <0>;
+ avdd-supply = <®_dc1sw>;
+ dvdd-supply = <®_dldo2>;
+ reset-gpios = <&pio 3 24 GPIO_ACTIVE_HIGH>; /* LCD-RST: PD24 */
+ backlight = <&backlight>;
+};
--
2.18.0.321.gffc6fa0e3
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