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Date: Thu, 24 Jan 2019 19:55:28 -0700 From: "Angus Ainslie (Purism)" <angus@...ea.ca> To: angus@...ea.ca Cc: angus.ainslie@...i.sm, Vinod Koul <vkoul@...nel.org>, dmaengine@...r.kernel.org, NXP Linux Team <linux-imx@....com>, Pengutronix Kernel Team <kernel@...gutronix.de>, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, Lucas Stach <l.stach@...gutronix.de>, Daniel Baluta <daniel.baluta@...il.com> Subject: [PATCH v4 5/5] imx8mq.dtsi: add the sdma nodes Add the sdma nodes to the base devicetree for the imx8mq Signed-off-by: Angus Ainslie (Purism) <angus@...ea.ca> --- arch/arm64/boot/dts/freescale/imx8mq.dtsi | 28 +++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mq.dtsi b/arch/arm64/boot/dts/freescale/imx8mq.dtsi index c0402375e7c1..f0cd3675ead0 100644 --- a/arch/arm64/boot/dts/freescale/imx8mq.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8mq.dtsi @@ -336,6 +336,17 @@ clocks = <&clk IMX8MQ_CLK_WDOG3_ROOT>; status = "disabled"; }; + + sdma2: sdma@...c0000 { + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma"; + reg = <0x302c0000 0x10000>; + interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_SDMA2_ROOT>, + <&clk IMX8MQ_CLK_SDMA2_ROOT>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; }; bus@...00000 { /* AIPS2 */ @@ -370,6 +381,8 @@ clocks = <&clk IMX8MQ_CLK_UART3_ROOT>, <&clk IMX8MQ_CLK_UART3_ROOT>; clock-names = "ipg", "per"; + dmas = <&sdma1 26 4 0>, <&sdma1 27 4 0>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -381,6 +394,8 @@ clocks = <&clk IMX8MQ_CLK_UART2_ROOT>, <&clk IMX8MQ_CLK_UART2_ROOT>; clock-names = "ipg", "per"; + dmas = <&sdma1 24 4 0>, <&sdma1 25 4 0>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -432,6 +447,8 @@ clocks = <&clk IMX8MQ_CLK_UART4_ROOT>, <&clk IMX8MQ_CLK_UART4_ROOT>; clock-names = "ipg", "per"; + dmas = <&sdma1 28 4 0>, <&sdma1 29 4 0>; + dma-names = "rx", "tx"; status = "disabled"; }; @@ -465,6 +482,17 @@ status = "disabled"; }; + sdma1: sdma@...d0000 { + compatible = "fsl,imx8mq-sdma", "fsl,imx7d-sdma"; + reg = <0x30bd0000 0x10000>; + interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX8MQ_CLK_SDMA1_ROOT>, + <&clk IMX8MQ_CLK_AHB>; + clock-names = "ipg", "ahb"; + #dma-cells = <3>; + fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; + }; + fec1: ethernet@...e0000 { compatible = "fsl,imx8mq-fec", "fsl,imx6sx-fec"; reg = <0x30be0000 0x10000>; -- 2.17.1
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