[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Message-Id: <20190125203009.24301-1-paul@crapouillou.net>
Date: Fri, 25 Jan 2019 17:30:08 -0300
From: Paul Cercueil <paul@...pouillou.net>
To: Liam Girdwood <lgirdwood@...il.com>,
Mark Brown <broonie@...nel.org>
Cc: alsa-devel@...a-project.org, linux-kernel@...r.kernel.org,
Paul Cercueil <paul@...pouillou.net>
Subject: [PATCH 1/2] sound: soc: JZ4740: Fix divider written at incorrect offset in register
The 4-bit divider value was written at offset 8, while the jz4740
programming manual locates it at offset 0.
Fixes: 26b0aad80a86
Signed-off-by: Paul Cercueil <paul@...pouillou.net>
---
sound/soc/jz4740/jz4740-i2s.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c
index 99394c036998..e099c0505b76 100644
--- a/sound/soc/jz4740/jz4740-i2s.c
+++ b/sound/soc/jz4740/jz4740-i2s.c
@@ -92,7 +92,7 @@
#define JZ_AIC_I2S_STATUS_BUSY BIT(2)
#define JZ_AIC_CLK_DIV_MASK 0xf
-#define I2SDIV_DV_SHIFT 8
+#define I2SDIV_DV_SHIFT 0
#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT)
#define I2SDIV_IDV_SHIFT 8
#define I2SDIV_IDV_MASK (0xf << I2SDIV_IDV_SHIFT)
--
2.11.0
Powered by blists - more mailing lists