| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Sat, 26 Jan 2019 23:38:43 +0800
From: Zhou Yanjie <zhouyanjie@...o.com>
To: linux-mips@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
robh+dt@...nel.org, paul.burton@...s.com, mark.rutland@....com,
marc.zyngier@....com, jason@...edaemon.net, tglx@...utronix.de,
syq@...ian.org, jiaxun.yang@...goat.com, 772753199@...com
Subject: [PATCH 4/4] Irqchip: Ingenic: Add support for the X1000.
Add support for probing the irq-ingenic driver on the X1000 Soc.
X1000 is a 1.0GHz processor for IoT. It has MIPS32 XBurst RISC core
with double precision hardware float point unit.
Signed-off-by: Zhou Yanjie <zhouyanjie@...o.com>
---
Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
index d4373d0..fa69b3f 100644
--- a/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
+++ b/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
@@ -8,6 +8,7 @@ Required properties:
ingenic,jz4770-intc
ingenic,jz4775-intc
ingenic,jz4780-intc
+ ingenic,x1000-intc
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
--
2.7.4
Powered by blists - more mailing lists