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Message-Id: <20190128154341.47195-6-sashal@kernel.org>
Date: Mon, 28 Jan 2019 10:38:43 -0500
From: Sasha Levin <sashal@...nel.org>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
Cc: Jernej Skrabec <jernej.skrabec@...l.net>,
Maxime Ripard <maxime.ripard@...tlin.com>,
Sasha Levin <sashal@...nel.org>
Subject: [PATCH AUTOSEL 4.20 006/304] clk: sunxi-ng: h6: Set video PLLs limits
From: Jernej Skrabec <jernej.skrabec@...l.net>
[ Upstream commit ed4433419d45bf8b58aef34c4450a27e1c8699e8 ]
Video PLL factors can be set in a way that final PLL rate is outside
stable range. H6 user manual specifically says that N factor should not
be below 12. While it doesn't says anything about maximum stable rate, it
is clear that PLL doesn't work at 6.096 GHz (254 * 24 MHz).
Set minimum allowed PLL video rate to 288 MHz (12 * 24 MHz) and maximum
to 2.4 GHz, which is maximum in BSP driver.
Signed-off-by: Jernej Skrabec <jernej.skrabec@...l.net>
Signed-off-by: Maxime Ripard <maxime.ripard@...tlin.com>
Signed-off-by: Sasha Levin <sashal@...nel.org>
---
drivers/clk/sunxi-ng/ccu-sun50i-h6.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
index 2193e1495086..19ff09f610e4 100644
--- a/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
+++ b/drivers/clk/sunxi-ng/ccu-sun50i-h6.c
@@ -120,6 +120,8 @@ static struct ccu_nm pll_video0_clk = {
.n = _SUNXI_CCU_MULT_MIN(8, 8, 12),
.m = _SUNXI_CCU_DIV(1, 1), /* input divider */
.fixed_post_div = 4,
+ .min_rate = 288000000,
+ .max_rate = 2400000000UL,
.common = {
.reg = 0x040,
.features = CCU_FEATURE_FIXED_POSTDIV,
@@ -136,6 +138,8 @@ static struct ccu_nm pll_video1_clk = {
.n = _SUNXI_CCU_MULT_MIN(8, 8, 12),
.m = _SUNXI_CCU_DIV(1, 1), /* input divider */
.fixed_post_div = 4,
+ .min_rate = 288000000,
+ .max_rate = 2400000000UL,
.common = {
.reg = 0x048,
.features = CCU_FEATURE_FIXED_POSTDIV,
--
2.19.1
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