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Message-Id: <e58c3c430c40da2ca0bbf735d33ecdd6cca67561.1548673552.git.christophe.leroy@c-s.fr>
Date: Mon, 28 Jan 2019 11:11:17 +0000 (UTC)
From: Christophe Leroy <christophe.leroy@....fr>
To: Benjamin Herrenschmidt <benh@...nel.crashing.org>,
Paul Mackerras <paulus@...ba.org>,
Michael Ellerman <mpe@...erman.id.au>
Cc: linux-kernel@...r.kernel.org, linuxppc-dev@...ts.ozlabs.org
Subject: [PATCH 03/11] powerpc/32: Add a macro for setting MSR_RI in
EXCEPTION_PROLOG_2
Setting MSR_RI applies to head_32 and head_8xx, but not to
head_40x. So in order to refactor EXCEPTION_PROLOG for 40x too,
this patch adds a macro for setting MSR_RI.
In the meantime, this gives the opportunity to make it
simpler on the 8xx as writing in SPRN_EID sets MSR_RI.
Signed-off-by: Christophe Leroy <christophe.leroy@....fr>
---
arch/powerpc/kernel/head_32.S | 2 ++
arch/powerpc/kernel/head_32.h | 7 +++++--
arch/powerpc/kernel/head_8xx.S | 2 ++
3 files changed, 9 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index a5efcdc78e8e..edc5e78faf08 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -37,6 +37,8 @@
#include <asm/export.h>
#include <asm/feature-fixups.h>
+#define SET_AND_STORE_MSR_RI(reg) li reg,MSR_KERNEL & ~(MSR_IR|MSR_DR); MTMSRD(reg)
+
#include "head_32.h"
/* 601 only have IBAT; cr0.eq is set on 601 when using this macro */
diff --git a/arch/powerpc/kernel/head_32.h b/arch/powerpc/kernel/head_32.h
index 7356c27d2136..9e6fb9d468f0 100644
--- a/arch/powerpc/kernel/head_32.h
+++ b/arch/powerpc/kernel/head_32.h
@@ -4,6 +4,10 @@
#include <asm/ptrace.h> /* for STACK_FRAME_REGS_MARKER */
+#ifndef SET_AND_STORE_MSR_RI
+#define SET_AND_STORE_MSR_RI(reg)
+#endif
+
/*
* Exception entry code. This code runs with address translation
* turned off, i.e. using physical addresses.
@@ -44,8 +48,7 @@
stw r1,GPR1(r11); \
stw r1,0(r11); \
tovirt(r1,r11); /* set new kernel sp */ \
- li r10,MSR_KERNEL & ~(MSR_IR|MSR_DR); /* can take exceptions */ \
- MTMSRD(r10); /* (except for mach check in rtas) */ \
+ SET_AND_STORE_MSR_RI(r10); /* can take exceptions */ \
stw r0,GPR0(r11); \
lis r10,STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */ \
addi r10,r10,STACK_FRAME_REGS_MARKER@l; \
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index d9c5bc48bef0..00dacec2b0d1 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -36,6 +36,8 @@
.macro DO_KVM intno
.endm
+#define SET_AND_STORE_MSR_RI(reg) mtspr SPRN_EID, reg
+
#include "head_32.h"
#if CONFIG_TASK_SIZE <= 0x80000000 && CONFIG_PAGE_OFFSET >= 0x80000000
--
2.13.3
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