lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <86r2cxufju.wl-marc.zyngier@arm.com>
Date:   Mon, 28 Jan 2019 12:34:13 +0000
From:   Marc Zyngier <marc.zyngier@....com>
To:     Julien Thierry <julien.thierry@....com>
Cc:     <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>, <daniel.thompson@...aro.org>,
        <joel@...lfernandes.org>, <christoffer.dall@....com>,
        <james.morse@....com>, <catalin.marinas@....com>,
        <will.deacon@....com>, <mark.rutland@....com>
Subject: Re: [PATCH v9 24/26] arm64: Skip preemption when exiting an NMI

On Mon, 21 Jan 2019 15:33:43 +0000,
Julien Thierry <julien.thierry@....com> wrote:
> 
> Handling of an NMI should not set any TIF flags. For NMIs received from
> EL0 the current exit path is safe to use.
> 
> However, an NMI received at EL1 could have interrupted some task context
> that has set the TIF_NEED_RESCHED flag. Preempting a task should not
> happen as a result of an NMI.
> 
> Skip preemption after handling an NMI from EL1.
> 
> Signed-off-by: Julien Thierry <julien.thierry@....com>
> Cc: Catalin Marinas <catalin.marinas@....com>
> Cc: Will Deacon <will.deacon@....com>
> Cc: Marc Zyngier <marc.zyngier@....com>
> ---
>  arch/arm64/kernel/entry.S | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/arm64/kernel/entry.S b/arch/arm64/kernel/entry.S
> index 35a47f6..a0b0a22 100644
> --- a/arch/arm64/kernel/entry.S
> +++ b/arch/arm64/kernel/entry.S
> @@ -624,6 +624,14 @@ el1_irq:
>  
>  #ifdef CONFIG_PREEMPT
>  	ldr	x24, [tsk, #TSK_TI_PREEMPT]	// get preempt count
> +alternative_if ARM64_HAS_IRQ_PRIO_MASKING
> +	/*
> +	 * DA_F were cleared at start of handling. If anything is set in DAIF,
> +	 * we come back from an NMI, so skip preemption
> +	 */
> +	mrs	x0, daif
> +	orr	x24, x24, x0
> +alternative_else_nop_endif
>  	cbnz	x24, 1f				// preempt count != 0
>  	bl	el1_preempt
>  1:

I find this a bit ugly, as what we have in x24 is not the preempt
count anymore. Maybe amend the comment above?

The code being nonetheless correct:

Acked-by: Marc Zyngier <marc.zyngier@....com>

	M.

-- 
Jazz is not dead, it just smell funny.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ