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Message-ID: <alpine.DEB.2.21.1901281700110.1582@nanos.tec.linutronix.de>
Date: Mon, 28 Jan 2019 17:00:34 +0100 (CET)
From: Thomas Gleixner <tglx@...utronix.de>
To: Daniel Vacek <neelx@...hat.com>
cc: mingo@...nel.org, "H. Peter Anvin" <hpa@...or.com>,
linux-tip-commits@...r.kernel.org,
open list <linux-kernel@...r.kernel.org>,
Borislav Petkov <bp@...en8.de>
Subject: Re: [tip:x86/timers] x86/tsc: Make calibration refinement more
robust
On Wed, 16 Jan 2019, Daniel Vacek wrote:
> On Fri, Jan 11, 2019 at 10:03 PM Thomas Gleixner <tglx@...utronix.de> wrote:
> >
> > No. The branch was not sent to Linus during the merge window due to holiday
> > season induced oversight.
>
> So does it wait for the next merge window now or is it still going to
> be sent? This is actually worth stable branches. I've confirmations
> from Hitachi and Nec that this really helps latest Skylake-X systems
> boot reliably.
It's in 5.0-rc4 now.
Thanks,
tglx
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