lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <7afb7753-39d2-69b9-3666-e159d3e85ae0@nvidia.com>
Date:   Mon, 28 Jan 2019 15:06:51 +0800
From:   jckuo <jckuo@...dia.com>
To:     Thierry Reding <thierry.reding@...il.com>,
        Kishon Vijay Abraham I <kishon@...com>
CC:     Jonathan Hunter <jonathanh@...dia.com>,
        <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/5] phy: tegra: xusb: Skip single function lane
 programming

Reviewed-by: JC Kuo <jckuo@...dia.com>

On 1/25/19 7:25 PM, Thierry Reding wrote:
> From: JC Kuo <jckuo@...dia.com>
>
> Tegra186 USB2 pads and USB3 pads do not have hardware mux for changing
> the pad function. For such "lanes", we can skip the lane mux register
> programming.
>
> Signed-off-by: JC Kuo <jckuo@...dia.com>
> Signed-off-by: Thierry Reding <treding@...dia.com>
> ---
>   drivers/phy/tegra/xusb.c | 6 +++++-
>   1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c
> index 5b3b8863363e..e3bc60cfe6a1 100644
> --- a/drivers/phy/tegra/xusb.c
> +++ b/drivers/phy/tegra/xusb.c
> @@ -1,5 +1,5 @@
>   /*
> - * Copyright (c) 2014-2015, NVIDIA CORPORATION.  All rights reserved.
> + * Copyright (c) 2014-2016, NVIDIA CORPORATION.  All rights reserved.
>    *
>    * This program is free software; you can redistribute it and/or modify it
>    * under the terms and conditions of the GNU General Public License,
> @@ -313,6 +313,10 @@ static void tegra_xusb_lane_program(struct tegra_xusb_lane *lane)
>   	const struct tegra_xusb_lane_soc *soc = lane->soc;
>   	u32 value;
>   
> +	/* skip single function lanes */
> +	if (soc->num_funcs < 2)
> +		return;
> +
>   	/* choose function */
>   	value = padctl_readl(padctl, soc->offset);
>   	value &= ~(soc->mask << soc->shift);

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ