linux-kernel - Re: [PATCH 2/5] ARCv2: introduce unaligned access under a Kconfig option

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Tue, 29 Jan 2019 21:44:44 +0000
From:   Vineet Gupta <vineet.gupta1@...opsys.com>
To:     Eugeniy Paltsev <eugeniy.paltsev@...opsys.com>,
        "linux-snps-arc@...ts.infradead.org" 
        <linux-snps-arc@...ts.infradead.org>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Alexey Brodkin" <alexey.brodkin@...opsys.com>
Subject: Re: [PATCH 2/5] ARCv2: introduce unaligned access under a Kconfig
 option

On 1/29/19 2:49 AM, Eugeniy Paltsev wrote:
> As of today we enable unaligned access unconditionally on ARCv2.
> Lets move it under Kconfig option so we can disable it in case of
> using HW configuration which lacks of it.
>
> Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@...opsys.com>
> ---
>  arch/arc/Kconfig                      | 8 ++++++++
>  arch/arc/include/asm/irqflags-arcv2.h | 4 ++++
>  arch/arc/kernel/intc-arcv2.c          | 4 +++-
>  3 files changed, 15 insertions(+), 1 deletion(-)
>
> diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
> index 376366a7db81..37c8aeefa3a5 100644
> --- a/arch/arc/Kconfig
> +++ b/arch/arc/Kconfig
> @@ -387,6 +387,14 @@ config ARC_HAS_SWAPE
>  
>  if ISA_ARCV2
>  
> +config ARC_USE_UNALIGNED_MEM_ACCESS
> +	bool "Handle unaligned access in HW and use it"
> +	default y
> +	help
> +	  The ARC HS architecture supports unaligned memory access
> +	  which is disabled by default. Enable unaligned access in
> +	  hardware and use it in software.
> +
>  config ARC_HAS_LL64
>  	bool "Insn: 64bit LDD/STD"
>  	help
> diff --git a/arch/arc/include/asm/irqflags-arcv2.h b/arch/arc/include/asm/irqflags-arcv2.h
> index 8a4f77ea3238..9b911e2c6b31 100644
> --- a/arch/arc/include/asm/irqflags-arcv2.h
> +++ b/arch/arc/include/asm/irqflags-arcv2.h
> @@ -44,8 +44,12 @@
>  #define ARCV2_IRQ_DEF_PRIO	1
>  
>  /* seed value for status register */
> +#ifdef CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS
>  #define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | STATUS_AD_MASK | \
>  					(ARCV2_IRQ_DEF_PRIO << 1))
> +#else
> +#define ISA_INIT_STATUS_BITS	(STATUS_IE_MASK | (ARCV2_IRQ_DEF_PRIO << 1))
> +#endif /* CONFIG_ARC_USE_UNALIGNED_MEM_ACCESS */

I'd prefer to change the define of STATUS_AD_MASK itself and keep all of this
unchanged !

>  
>  #ifndef __ASSEMBLY__
>  
> diff --git a/arch/arc/kernel/intc-arcv2.c b/arch/arc/kernel/intc-arcv2.c
> index 067ea362fb3e..84b1c7157d1b 100644
> --- a/arch/arc/kernel/intc-arcv2.c
> +++ b/arch/arc/kernel/intc-arcv2.c
> @@ -93,7 +93,9 @@ void arc_init_IRQ(void)
>  
>  	/* setup status32, don't enable intr yet as kernel doesn't want */
>  	tmp = read_aux_reg(ARC_REG_STATUS32);
> -	tmp |= STATUS_AD_MASK | (ARCV2_IRQ_DEF_PRIO << 1);
> +	if (IS_ENABLED(ARC_USE_UNALIGNED_MEM_ACCESS))
> +		tmp |= STATUS_AD_MASK;
> +	tmp |= ARCV2_IRQ_DEF_PRIO << 1;

This will change after rebase as we just need to delete the code here, done in head.S

>  	tmp &= ~STATUS_IE_MASK;
>  	asm volatile("kflag %0	\n"::"r"(tmp));
>  }