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Message-ID: <20190129101348.7oxqerszhcopanzr@vireshk-i7>
Date: Tue, 29 Jan 2019 15:43:48 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Andrew-sh Cheng <andrew-sh.cheng@...iatek.com>
Cc: MyungJoo Ham <myungjoo.ham@...sung.com>,
Kyungmin Park <kyungmin.park@...sung.com>,
Chanwoo Choi <cw00.choi@...sung.com>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Matthias Brugger <matthias.bgg@...il.com>,
"Rafael J. Wysocki" <rjw@...ysocki.net>, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-mediatek@...ts.infradead.org, linux-kernel@...r.kernel.org,
srv_heupstream@...iatek.com, fan.chen@...iatek.com
Subject: Re: [PATCH 1/3] cpufreq: mediatek: add mt8183 cpufreq support
On 29-01-19, 14:35, Andrew-sh Cheng wrote:
> From: "Andrew-sh.Cheng" <andrew-sh.cheng@...iatek.com>
>
> For new mediatek chip mt8183,
> cci and little cluster share the same buck,
> so need to modify the attribute of regulator from exclusive to optional
>
> Intermediate clock is not always enabled by ccf in different projects,
> so cpufreq should always enable it by itself.
>
> Signed-off-by: Andrew-sh.Cheng <andrew-sh.cheng@...iatek.com>
> ---
> drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
> drivers/cpufreq/mediatek-cpufreq.c | 7 ++++++-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c b/drivers/cpufreq/cpufreq-dt-platdev.c
> index b1c5468..5a1c588 100644
> --- a/drivers/cpufreq/cpufreq-dt-platdev.c
> +++ b/drivers/cpufreq/cpufreq-dt-platdev.c
> @@ -117,6 +117,7 @@
> { .compatible = "mediatek,mt817x", },
> { .compatible = "mediatek,mt8173", },
> { .compatible = "mediatek,mt8176", },
> + { .compatible = "mediatek,mt8183", },
>
> { .compatible = "nvidia,tegra124", },
>
> diff --git a/drivers/cpufreq/mediatek-cpufreq.c b/drivers/cpufreq/mediatek-cpufreq.c
> index eb8920d..e956248 100644
> --- a/drivers/cpufreq/mediatek-cpufreq.c
> +++ b/drivers/cpufreq/mediatek-cpufreq.c
> @@ -355,7 +355,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
> goto out_free_resources;
> }
>
> - proc_reg = regulator_get_exclusive(cpu_dev, "proc");
> + proc_reg = regulator_get_optional(cpu_dev, "proc");
> if (IS_ERR(proc_reg)) {
> if (PTR_ERR(proc_reg) == -EPROBE_DEFER)
> pr_warn("proc regulator for cpu%d not ready, retry.\n",
> @@ -385,6 +385,9 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
> goto out_free_resources;
> }
>
> + ret = clk_prepare_enable(inter_clk);
> + if (ret)
> + goto out_free_resources;
Add a blank line here please.
Also out_free_resources isn't enough here and you need to free OPP table as
well.
> /* Search a safe voltage for intermediate frequency. */
> rate = clk_get_rate(inter_clk);
> opp = dev_pm_opp_find_freq_ceil(cpu_dev, &rate);
> @@ -412,6 +415,7 @@ static int mtk_cpu_dvfs_info_init(struct mtk_cpu_dvfs_info *info, int cpu)
>
> out_free_opp_table:
> dev_pm_opp_of_cpumask_remove_table(&info->cpus);
> + clk_disable_unprepare(inter_clk);
Clock was enabled after adding the table, and so it must be disabled before
removing the table. Just the opposite sequence.
>
> out_free_resources:
> if (!IS_ERR(proc_reg))
> @@ -551,6 +555,7 @@ static int mtk_cpufreq_probe(struct platform_device *pdev)
> { .compatible = "mediatek,mt817x", },
> { .compatible = "mediatek,mt8173", },
> { .compatible = "mediatek,mt8176", },
> + { .compatible = "mediatek,mt8183", },
>
> { }
> };
> --
> 1.8.1.1.dirty
--
viresh
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