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Message-Id: <1548762199-7065-2-git-send-email-yash.shah@sifive.com>
Date: Tue, 29 Jan 2019 17:13:18 +0530
From: Yash Shah <yash.shah@...ive.com>
To: palmer@...ive.com, linux-pwm@...r.kernel.org,
linux-riscv@...ts.infradead.org
Cc: thierry.reding@...il.com, robh+dt@...nel.org, mark.rutland@....com,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
sachin.ghadi@...ive.com, paul.walmsley@...ive.com,
Yash Shah <yash.shah@...ive.com>
Subject: [PATCH v5 1/2] pwm: sifive: Add DT documentation for SiFive PWM Controller
DT documentation for PWM controller added.
Signed-off-by: Wesley W. Terpstra <wesley@...ive.com>
[Atish: Compatible string update]
Signed-off-by: Atish Patra <atish.patra@....com>
Signed-off-by: Yash Shah <yash.shah@...ive.com>
---
.../devicetree/bindings/pwm/pwm-sifive.txt | 33 ++++++++++++++++++++++
1 file changed, 33 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.txt
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt
new file mode 100644
index 0000000..8dcb40d
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt
@@ -0,0 +1,33 @@
+SiFive PWM controller
+
+Unlike most other PWM controllers, the SiFive PWM controller currently only
+supports one period for all channels in the PWM. This is set globally in DTS.
+The period also has significant restrictions on the values it can achieve,
+which the driver rounds to the nearest achievable frequency.
+PWM RTL that corresponds to the IP block version numbers can be found
+here:
+
+https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
+
+Required properties:
+- compatible: Should be "sifive,$socname-pwm" and "sifive,pwmX".
+ Please refer to sifive-blocks-ip-versioning.txt for details.
+- reg: physical base address and length of the controller's registers
+- clocks: Should contain a clock identifier for the PWM's parent clock.
+- #pwm-cells: Should be 2.
+ The first cell is the PWM channel number
+ The second cell is the PWM polarity
+- sifive,period-ns: the driver will get as close to this period as it can
+- interrupts: one interrupt per PWM channel
+
+Examples:
+
+pwm: pwm@...20000 {
+ compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
+ reg = <0x0 0x10020000 0x0 0x1000>;
+ clocks = <&tlclk>;
+ interrupt-parent = <&plic>;
+ interrupts = <42 43 44 45>;
+ #pwm-cells = <2>;
+ sifive,period-ns = <1000000>;
+};
--
1.9.1
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