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Date: Tue, 29 Jan 2019 21:36:05 +0800 From: Leo Yan <leo.yan@...aro.org> To: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org> Cc: Rob Herring <robh+dt@...nel.org>, Mathieu Poirier <mathieu.poirier@...aro.org>, Suzuki K Poulose <suzuki.poulose@....com>, Mike Leach <mike.leach@...aro.org>, Alexander Shishkin <alexander.shishkin@...ux.intel.com>, Andy Gross <andy.gross@...aro.org>, David Brown <david.brown@...aro.org>, Vivek Gautam <vivek.gautam@...eaurora.org>, Jeffrey Hugo <jhugo@...eaurora.org>, Doug Anderson <dianders@...omium.org>, Stephen Boyd <sboyd@...nel.org>, Bjorn Andersson <bjorn.andersson@...aro.org>, devicetree@...r.kernel.org, Mark Rutland <mark.rutland@....com>, Marc Gonzalez <marc.w.gonzalez@...e.fr>, Rajendra Nayak <rnayak@...eaurora.org>, Sibi Sankar <sibis@...eaurora.org>, Tingwei Zhang <tingwei@...eaurora.org>, linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org Subject: Re: [PATCHv5 6/7] coresight: debug: Add Unique Component Identifier (UCI) table On Tue, Jan 29, 2019 at 09:25:28PM +0800, Leo Yan wrote: > On Tue, Jan 29, 2019 at 12:44:03AM +0530, Sai Prakash Ranjan wrote: > > Add UCI table and a helper macro for coresight CPU debug > > module. This patch adds the UCI entries for Krypo CPUs > > found on MSM8996 which shares the same PIDs as ETMs. > > > > Without this, below error is observed on MSM8996: > > > > [ 5.429867] OF: graph: no port node found in /soc/debug@...0000 > > [ 5.429938] coresight-etm4x: probe of 3810000.debug failed with error -22 > > [ 5.435415] coresight-cpu-debug 3810000.debug: Coresight debug-CPU0 initialized > > [ 5.446474] OF: graph: no port node found in /soc/debug@...0000 > > [ 5.448927] coresight-etm4x: probe of 3910000.debug failed with error -22 > > [ 5.454681] coresight-cpu-debug 3910000.debug: Coresight debug-CPU1 initialized > > [ 5.487765] OF: graph: no port node found in /soc/debug@...0000 > > [ 5.488007] coresight-etm4x: probe of 3a10000.debug failed with error -22 > > [ 5.493024] coresight-cpu-debug 3a10000.debug: Coresight debug-CPU2 initialized > > [ 5.501802] OF: graph: no port node found in /soc/debug@...0000 > > [ 5.512901] coresight-etm4x: probe of 3b10000.debug failed with error -22 > > [ 5.513192] coresight-cpu-debug 3b10000.debug: Coresight debug-CPU3 initialized > > > > Also add a helper macro to make adding CPU PIDs easier > > similar to ETM4X driver. > > > > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@...eaurora.org> > > Looks good to me and tested on my Hikey board (though I cannot test > for a device with UCI ID): > > Reviewed-and-tested-by: Leo Yan <leo.yan@...aro.org> I just now found if apply this patch onto coresight next branch [1], it will conflict with patch 'coresight: cpu-debug: Support for CA73 CPUs' [2]. Sorry if introduce regression by this. Hi Mathieu, could you confirm should apply this patch onto to coresight next branch? [...] Thanks, Leo Yan [1] https://git.linaro.org/kernel/coresight.git/log/?h=next [2] https://git.linaro.org/kernel/coresight.git/commit/?h=next&id=14420b405d03cd160b5ace283693ce5b1cf273fa
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