linux-kernel - Re: [PATCH v2 5/8] drivers: pinctrl: msm: setup GPIO irqchip hierarchy

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <154888832839.169292.6913084380036629941@swboyd.mtv.corp.google.com>
Date:   Wed, 30 Jan 2019 14:45:28 -0800
From:   Stephen Boyd <swboyd@...omium.org>
To:     Lina Iyer <ilina@...eaurora.org>, evgreen@...omium.org,
        marc.zyngier@....com
Cc:     linux-kernel@...r.kernel.org, rplsssn@...eaurora.org,
        linux-arm-msm@...r.kernel.org, thierry.reding@...il.com,
        bjorn.andersson@...aro.org, dianders@...omium.org,
        linus.walleij@...aro.org, Lina Iyer <ilina@...eaurora.org>
Subject: Re: [PATCH v2 5/8] drivers: pinctrl: msm: setup GPIO irqchip hierarchy

Quoting Lina Iyer (2019-01-24 12:22:02)
> To allow GPIOs to wakeup the system from suspend or deep idle, the
> wakeup capable GPIOs are setup in hierarchy with interrupts from the
> wakeup-parent irqchip.
> 
> In older SoC's, the TLMM will handover detection to the parent irqchip
> and in newer SoC's, the parent irqchip may also be active as well as the
> TLMM and therefore the GPIOs need to be masked at TLMM to avoid
> duplicate interrupts. To enable both these configurations to exist,
> allow the parent irqchip to dictate the TLMM irqchip's behavior when
> masking/unmasking the interrupt.
> 
> Co-developed-by: Stephen Boyd <swboyd@...omium.org>
> Signed-off-by: Lina Iyer <ilina@...eaurora.org>
> 
> ---
> Changes in v2:
>         - Fix bug when unmaksing PDC interrupt

What was the bug? Is that why the mask callback in this gpio chip no
longer calls the parent irq chip? We should keep calling the parent
irqchip from what I can tell. Otherwise, we may never mask the irq at
the PDC and only mask it at the GPIO level, which may not even care
about it if it's being monitored by the PDC.

This causes me to get a bunch of interrupts on my touchscreen when I
touch it once vs. only a handful (like 4) when I fix it with the below
patch:

Can you fold it in?

diff --git a/drivers/pinctrl/qcom/pinctrl-msm.c b/drivers/pinctrl/qcom/pinctrl-msm.c
index dd72ec8fb8db..9b45219893bd 100644
--- a/drivers/pinctrl/qcom/pinctrl-msm.c
+++ b/drivers/pinctrl/qcom/pinctrl-msm.c
@@ -682,6 +682,9 @@ static void msm_gpio_irq_mask(struct irq_data *d)
 	clear_bit(d->hwirq, pctrl->enabled_irqs);
 
 	raw_spin_unlock_irqrestore(&pctrl->lock, flags);
+
+	if (d->parent_data)
+		irq_chip_mask_parent(d);
 }
 
 static void msm_gpio_irq_unmask(struct irq_data *d)