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Message-ID: <20190130120647.abbf2cbbpguaz356@linutronix.de>
Date: Wed, 30 Jan 2019 13:06:47 +0100
From: Sebastian Andrzej Siewior <bigeasy@...utronix.de>
To: Borislav Petkov <bp@...en8.de>
Cc: linux-kernel@...r.kernel.org, x86@...nel.org,
Andy Lutomirski <luto@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
kvm@...r.kernel.org, "Jason A. Donenfeld" <Jason@...c4.com>,
Rik van Riel <riel@...riel.com>,
Dave Hansen <dave.hansen@...ux.intel.com>
Subject: Re: [PATCH v6] x86: load FPU registers on return to userland
On 2019-01-30 12:35:55 [+0100], Borislav Petkov wrote:
> On Wed, Jan 09, 2019 at 12:47:22PM +0100, Sebastian Andrzej Siewior wrote:
> > This is a refurbished series originally started by by Rik van Riel. The
> > goal is load the FPU registers on return to userland and not on every
> > context switch. By this optimisation we can:
> > - avoid loading the registers if the task stays in kernel and does
> > not return to userland
> > - make kernel_fpu_begin() cheaper: it only saves the registers on the
> > first invocation. The second invocation does not need save them again.
>
> Btw, do we have any benchmark data showing the improvement this brings?
nope. There is sig_lat or something like that which would measure how
many signals you can handle a second. That could show how bad the
changes are in the signal path.
I don't think that I need any numbers to show that all but first
invocation of kernel_fpu_begin() is "free". That would be the claim in
the second bullet.
And for the first bullet. Hmmm. I could add a trace point to see how
often we entered schedule() without saving FPU registers for user tasks.
That would mean the benefit is that we didn't restore them while we left
schedule() and didn't save them while entered schedule() (again).
I don't know if hackbench would show anything besides noise.
Sebastian
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