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Message-Id: <20190131051438.12867-1-bjorn.andersson@linaro.org>
Date: Wed, 30 Jan 2019 21:14:38 -0800
From: Bjorn Andersson <bjorn.andersson@...aro.org>
To: Andy Gross <andy.gross@...aro.org>,
David Brown <david.brown@...aro.org>,
Douglas Anderson <dianders@...omium.org>
Cc: Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: [PATCH v2] arm64: dts: qcom: sdm845: Add clocks and iommus to WCN3990 WLAN node
From: Douglas Anderson <dianders@...omium.org>
When commit be7019103469 ("dts: arm64/sdm845: Add WCN3990 WLAN module
device node") was posted upstream no clocks were specified. However,
when the pack was picked into the Chrome OS kernel tree (allegedly
directly from the mailing list post) it had clock properties.
I presume that the clock should be there, so let's add it.
Fixes: be7019103469 ("dts: arm64/sdm845: Add WCN3990 WLAN module device node")
Signed-off-by: Douglas Anderson <dianders@...omium.org>
[bjorn: Add also the required iommus property]
Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
---
Hijacking Doug's fixup patch to also add the missing iommus property. Without
this the MTP reboots once the ath10k is trying to exercise the copyengine.
arch/arm64/boot/dts/qcom/sdm845.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index cba09899282e..58f034664336 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -2422,6 +2422,8 @@
reg = <0 0x18800000 0 0x800000>;
reg-names = "membase";
memory-region = <&wlan_msa_mem>;
+ clock-names = "cxo_ref_clk_pin";
+ clocks = <&rpmhcc RPMH_RF_CLK2>;
interrupts =
<GIC_SPI 414 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 415 IRQ_TYPE_LEVEL_HIGH>,
@@ -2435,6 +2437,7 @@
<GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>;
+ iommus = <&apps_smmu 0x0040 0x1>;
};
};
--
2.18.0
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