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Message-ID: <CAE=gft7DNKu93c8e47nrC7Q7h4VL3vGwkj8ycQM8yVdCdjb+hw@mail.gmail.com>
Date: Thu, 31 Jan 2019 08:36:12 -0800
From: Evan Green <evgreen@...omium.org>
To: Yong Wu <yong.wu@...iatek.com>
Cc: Joerg Roedel <joro@...tes.org>,
Matthias Brugger <matthias.bgg@...il.com>,
Robin Murphy <robin.murphy@....com>,
Rob Herring <robh+dt@...nel.org>,
Tomasz Figa <tfiga@...gle.com>,
Will Deacon <will.deacon@....com>,
linux-mediatek@...ts.infradead.org, srv_heupstream@...iatek.com,
"open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS"
<devicetree@...r.kernel.org>, LKML <linux-kernel@...r.kernel.org>,
linux-arm-kernel@...ts.infradead.org,
iommu@...ts.linux-foundation.org, Arnd Bergmann <arnd@...db.de>,
yingjoe.chen@...iatek.com, youlin.pei@...iatek.com,
Nicolas Boichat <drinkcat@...omium.org>
Subject: Re: [PATCH v5 11/20] iommu/mediatek: Move vld_pa_rng into plat_data
On Wed, Jan 30, 2019 at 7:20 PM Yong Wu <yong.wu@...iatek.com> wrote:
>
> On Wed, 2019-01-30 at 10:30 -0800, Evan Green wrote:
> > On Mon, Dec 31, 2018 at 7:58 PM Yong Wu <yong.wu@...iatek.com> wrote:
> > >
> > > Both mt8173 and mt8183 don't have this vld_pa_rng(valid physical address
> > > range) register while mt2712 have. Move it into the plat_data.
> > >
> > > Signed-off-by: Yong Wu <yong.wu@...iatek.com>
> > > ---
> > > drivers/iommu/mtk_iommu.c | 3 ++-
> > > drivers/iommu/mtk_iommu.h | 1 +
> > > 2 files changed, 3 insertions(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
> > > index 8d8ab21..2913ddb 100644
> > > --- a/drivers/iommu/mtk_iommu.c
> > > +++ b/drivers/iommu/mtk_iommu.c
> > > @@ -548,7 +548,7 @@ static int mtk_iommu_hw_init(const struct mtk_iommu_data *data)
> > > upper_32_bits(data->protect_base);
> > > writel_relaxed(regval, data->base + REG_MMU_IVRP_PADDR);
> > >
> > > - if (data->enable_4GB && data->plat_data->m4u_plat != M4U_MT8173) {
> > > + if (data->enable_4GB && data->plat_data->vld_pa_rng) {
> > > /*
> > > * If 4GB mode is enabled, the validate PA range is from
> > > * 0x1_0000_0000 to 0x1_ffff_ffff. here record bit[32:30].
> > > @@ -741,6 +741,7 @@ static int __maybe_unused mtk_iommu_resume(struct device *dev)
> > > .m4u_plat = M4U_MT2712,
> > > .has_4gb_mode = true,
> > > .has_bclk = true,
> > > + .vld_pa_rng = true,
> > > .larbid_remap = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9},
> > > };
> > >
> > > diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
> > > index b46aeaa..a8c5d1e 100644
> > > --- a/drivers/iommu/mtk_iommu.h
> > > +++ b/drivers/iommu/mtk_iommu.h
> > > @@ -48,6 +48,7 @@ struct mtk_iommu_plat_data {
> > > /* HW will use the EMI clock if there isn't the "bclk". */
> > > bool has_bclk;
> > > bool reset_axi;
> > > + bool vld_pa_rng;
> >
> > I agree with Nicolas that valid_pa_range would be much clearer...
> > although, even now that I know what it's supposed to mean, I don't get
> > what it represents. What is this saying?
>
> This register in the coda is called "vld_pa_rng".
>
> How about I change it to "has_vld_pa_rng"?. In the comment above, I have
> explained the meaning(valid physical address range).
>
Ok, that sounds fine.
-Evan
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