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Date:   Fri, 1 Feb 2019 13:22:29 +0800
From:   Herbert Xu <herbert@...dor.apana.org.au>
To:     Zhou Wang <wangzhou1@...ilicon.com>
Cc:     "David S . Miller" <davem@...emloft.net>,
        linux-crypto@...r.kernel.org, linuxarm@...wei.com,
        linux-kernel@...r.kernel.org, Kenneth Lee <liguozhu@...ilicon.com>,
        Shiju Jose <shiju.jose@...wei.com>,
        Hao Fang <fanghao11@...wei.com>
Subject: Re: [PATCH v2 2/4] crypto: hisilicon: Add queue management driver
 for HiSilicon QM module

On Wed, Jan 23, 2019 at 09:08:51PM +0800, Zhou Wang wrote:
>
> +/**
> + * hisi_qp_poll() - Poll current cqe to see if a task is finished.
> + * @qp: The qp which will poll.
> + *
> + * This function polls current cqe for a give qp to see if a task is finished.
> + * Return -ETIME if timeout.
> + */
> +int hisi_qp_poll(struct hisi_qp *qp)
> +{
> +	struct qm_cqe *cqe = qp->cqe + qp->qp_status.cq_head;
> +	struct qm_cqc *cqc = qp->cqc;
> +	int retries = 1000;
> +
> +	while (!(QM_CQE_PHASE(cqe) == (cqc->dw6 & 0x1))) {
> +		dma_rmb();
> +		if (!--retries) {
> +			dev_err(&qp->qm->pdev->dev, "Poll cqe failed!\n");
> +			return -ETIME;
> +		}
> +		udelay(10);
> +	}
> +
> +	qm_cq_head_update(qp);
> +	atomic_dec(&qp->qp_status.used);
> +
> +	qm_db(qp->qm, qp->qp_id, QM_DOORBELL_CMD_CQ, qp->qp_status.cq_head, 0);
> +	/* set c_flag */
> +	qm_db(qp->qm, qp->qp_id, QM_DOORBELL_CMD_CQ, qp->qp_status.cq_head, 1);
> +
> +	return 0;
> +}
> +EXPORT_SYMBOL_GPL(hisi_qp_poll);

Polling in softirq context is unacceptable.  Can't your hardware
send interrupts to signal completion? What is the average speed
of processing a single 1500-byte packet on your hardware?

Cheers,
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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