lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:   Fri, 1 Feb 2019 06:51:39 +0000
From:   <Tudor.Ambarus@...rochip.com>
To:     <bbrezillon@...nel.org>
CC:     <mark.rutland@....com>, <devicetree@...r.kernel.org>,
        <alexandre.belloni@...tlin.com>, <linux-kernel@...r.kernel.org>,
        <robh+dt@...nel.org>, <linux-spi@...r.kernel.org>,
        <Ludovic.Desroches@...rochip.com>, <broonie@...nel.org>,
        <linux-mtd@...ts.infradead.org>,
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH v2 01/10] spi: atmel-quadspi: cache MR value to avoid a
 write access



On 01/31/2019 06:55 PM, Boris Brezillon wrote:
> On Thu, 31 Jan 2019 16:15:28 +0000
> <Tudor.Ambarus@...rochip.com> wrote:
> 
>> From: Tudor Ambarus <tudor.ambarus@...rochip.com>
>>
>> Cache MR value to avoid write access when setting the controller
>> in Serial Memory Mode (SMM). SMM is set in exec_op() and not at
>> probe time, to let room for future regular SPI support.
>>
>> Signed-off-by: Tudor Ambarus <tudor.ambarus@...rochip.com>
>> ---
>> v2: cache MR value instead of moving the write access at probe
>>
>>  drivers/spi/atmel-quadspi.c | 5 ++++-
>>  1 file changed, 4 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/spi/atmel-quadspi.c b/drivers/spi/atmel-quadspi.c
>> index ddc712410812..fe05aee5d845 100644
>> --- a/drivers/spi/atmel-quadspi.c
>> +++ b/drivers/spi/atmel-quadspi.c
>> @@ -155,6 +155,7 @@ struct atmel_qspi {
>>  	struct clk		*clk;
>>  	struct platform_device	*pdev;
>>  	u32			pending;
>> +	u32			mr;
>>  	struct completion	cmd_completion;
>>  };
>>  
>> @@ -238,7 +239,9 @@ static int atmel_qspi_exec_op(struct spi_mem *mem, const struct spi_mem_op *op)
>>  	icr = QSPI_ICR_INST(op->cmd.opcode);
>>  	ifr = QSPI_IFR_INSTEN;
>>  
>> -	qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
>> +	/* Set the QSPI controller in Serial Memory Mode */
>> +	if (!(aq->mr & QSPI_MR_SMM))
> 
> 	if (aq->mr != QSPI_MR_SMM)

then I should probably rename mr to smm.

> 
>> +		qspi_writel(aq, QSPI_MR, QSPI_MR_SMM);
> 
> You need to update ->mr here.

of course, thanks!

> 
>>  
>>  	mode = find_mode(op);
>>  	if (mode < 0)
> 
> 
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@...ts.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
> 

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ