linux-kernel - Re: [PATCH v5 09/10] arm64: dts: qcom: Add AOSS QMP node

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Message-ID: <fe4c1e15-ae5d-3f10-e265-39df3230c30c@codeaurora.org>
Date:   Fri, 1 Feb 2019 12:47:25 +0530
From:   Sibi Sankar <sibis@...eaurora.org>
To:     Bjorn Andersson <bjorn.andersson@...aro.org>,
        Andy Gross <andy.gross@...aro.org>,
        David Brown <david.brown@...aro.org>
Cc:     Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Ohad Ben-Cohen <ohad@...ery.com>,
        Arun Kumar Neelakantam <aneela@...eaurora.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-remoteproc@...r.kernel.org
Subject: Re: [PATCH v5 09/10] arm64: dts: qcom: Add AOSS QMP node

Hey Bjorn,

Tested-by: Sibi Sankar <sibis@...eaurora.org>
Reviewed-by: Sibi Sankar <sibis@...eaurora.org>


On 01/31/2019 06:09 AM, Bjorn Andersson wrote:
> The AOSS QMP provides a number of power domains, used for QDSS and
> PIL, add the node for this.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@...aro.org>
> ---
> 
> Changes since v4:
> - None
> 
> Changes since v3:
> - None
> 
>   arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++++++++++
>   1 file changed, 10 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> index 07d9cd6fba7d..dc43fee8bb90 100644
> --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
> @@ -14,6 +14,7 @@
>   #include <dt-bindings/interconnect/qcom,sdm845.h>
>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>   #include <dt-bindings/phy/phy-qcom-qusb2.h>
> +#include <dt-bindings/power/qcom-aoss-qmp.h>
>   #include <dt-bindings/power/qcom-rpmpd.h>
>   #include <dt-bindings/reset/qcom,sdm845-aoss.h>
>   #include <dt-bindings/reset/qcom,sdm845-pdc.h>
> @@ -2076,6 +2077,15 @@
>   			#reset-cells = <1>;
>   		};
>   
> +		aoss_qmp: qmp@...0000 {
> +			compatible = "qcom,sdm845-aoss-qmp";
> +			reg = <0 0x0c300000 0 0x100000>;
> +			interrupts = <GIC_SPI 389 IRQ_TYPE_EDGE_RISING>;
> +			mboxes = <&apss_shared 0>;
> +
> +			#power-domain-cells = <1>;
> +		};
> +
>   		spmi_bus: spmi@...0000 {
>   			compatible = "qcom,spmi-pmic-arb";
>   			reg = <0 0x0c440000 0 0x1100>,
> 

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