linux-kernel - [Question] setup_data_interface() hook when switching to a different type of NAND chip

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Message-ID: <CAK7LNAQLzvW-zDaR8qkDaxEXxmiCj7XQDK-G57sPhvZu1_eBdA@mail.gmail.com>
Date:   Fri, 1 Feb 2019 19:27:46 +0900
From:   Masahiro Yamada <yamada.masahiro@...ionext.com>
To:     Boris Brezillon <boris.brezillon@...tlin.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>,
        linux-mtd <linux-mtd@...ts.infradead.org>
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: [Question] setup_data_interface() hook when switching to a different
 type of NAND chip

Hi.

When I was looking into the NAND controller/chips separation,
this question popped up in my mind.

Commit 2d472aba15ff169 provides us a more flexibility
about the controller/chips connection.
The connected NAND chips do not need to be homogeneous
any more.

My question is about the ->setup_data_interface() hook
when switching between NAND chips with different speed (timing mode).

Think about the case below:

{
        compatible = "foo-nand-controller";
        reg = <...>;
        #address-cells = <1>;
        #size-cells = <0>;

        nand@0 {
                  reg = <0>;
                  /* Slow NAND chip */
        }

        nand@1 {
                  reg = <1>;
                  /* Fast NAND chip */
        }

}

In this case, two devices /dev/mtdblock0 and /dev/mtdblock1
will appear.

If a user gets access to those two devices in turns,
I think ->setup_data_interface() should be invoked somehow
in order to update the timing registers on the controller side.

Currently, ->setup_data_interface() is invoked in nand_scan_tail()
and that's it.

So, both nand@0 and nand@1 are accessed by the timing mode of nand@1
(assuming nand@0 and nand@1 are initialized in this order)

Of course, it depends on the controller.

If a controller has a register set for every chip select,
the hardware will be able to change the access speed automatically.

I think most of controllers just have a single set of timing registers.
So, when switching between different types of chips,
the driver must update the timing registers.

If this is a worthwhile usecase,
should it be taken care of by the NAND framework,
or by drivers ?

I just thought we could do something in
nand_get_device() / nand_release_device().

If this should be done per driver,
drivers can update registers in select_target or select_chip.

Thought?

-- 
Best Regards
Masahiro Yamada