linux-kernel - Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos 5422 SoC

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Message-id: <08850f80-0cc1-8e0d-6a8a-286a750d3a8c@samsung.com>
Date:   Fri, 01 Feb 2019 15:19:30 +0100
From:   Sylwester Nawrocki <s.nawrocki@...sung.com>
To:     Lukasz Luba <l.luba@...tner.samsung.com>,
        Chanwoo Choi <cw00.choi@...sung.com>
Cc:     devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-pm@...r.kernel.org, linux-samsung-soc@...r.kernel.org,
        b.zolnierkie@...sung.com, krzk@...nel.org, kgene@...nel.org,
        kyungmin.park@...sung.com, m.szyprowski@...sung.com,
        myungjoo.ham@...sung.com,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>, linux-clk@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v3 3/8] clk: samsung: add BPLL rate table for Exynos
 5422 SoC

On 2/1/19 14:56, Lukasz Luba wrote:
>> Exynos5422 used the same PLL table for apll, kpll, bpll and so on.
>> You don't need to make the separate pll table. Just add new entries
>> to exynos5420_pll2550x_24mhz_tbl table.
> OK, I will extend the exynos5420_pll2550x_24mhz_tbl table.
> 
> In v4 patch set, it will be fixed.

I would prefer to keep the rate table separate for BPLL, until correctness
of new rates introduced in the patch and their applicability to the other PLLs
is confirmed by the hardware team and verified in tests.


-- 
Regards,
Sylwester