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Message-Id: <20190201145345.6795-1-jbrunet@baylibre.com>
Date: Fri, 1 Feb 2019 15:53:41 +0100
From: Jerome Brunet <jbrunet@...libre.com>
To: Neil Armstrong <narmstrong@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Michael Turquette <mturquette@...libre.com>
Cc: Jerome Brunet <jbrunet@...libre.com>,
Kevin Hilman <khilman@...libre.com>,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-amlogic@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, Jian Hu <jian.hu@...ogic.com>
Subject: [PATCH v6 0/4] clk: meson-g12a: Add EE clock controller driver
This purpose of this patchset is to the main clock controller of the
g12a SoC family
This patchset depends on the recent rework the meson clock directory [7].
Changes since v5 [6]:
* use clock input driver until something better comes along in CCF
* fix pll fractional param size
* fix broken gp0 and hifi pll param (<55)
* add hdmi pll
* fix fdiv2p5
* add mpll_50m
* fix mpll clock tree (missing fix 2 divider)
* add missing sdio clocks
* add vpu clocks
* add some RO clock gates
* rabase on clk-meson tree
Changes since v4 [5]:
* add bypass clock "g12a_ee_core" from DT
* fix Kconfig description
* change g12a_mpll0_div/g12a_mpll1_div/g12a_mpll2_div/g12a_mpll3_div
clock's parent name as fixed_pll_dco
* drop CLK_SET_RATE_PARENT flag for pll clock
* drop CLK_GET_RATE_NOCACHE flag for pll_dco clock
* delete usless note
* enable G12A clock driver
Changes since v3 [4]:
* add fixed clocks clk_regmap definition
Changes since v2 [2]:
* fix fixed clock descriptions
* fix alignment
* add enable bit for plls base on [3] patches
* add fixed clock gate bit
Changes since v1 [1]:
* fix typo of 'Everything'.
* change the word 'AmLogic' to 'Amlogic'
* squash patch 1 and 2.
* delete usless message of "Trying obsolete regs".
* delete the empty line in include/dt-bindings/clock/g12a-clkc.h.
* rebase on top of the "next/drivers" branch, and add g12a clock patch.
* add CLK_MUX_ROUND_CLOSEST for g12a_sd_emmc_b_clk0_sel and
g12a_sd_emmc_c_clk0_sel.
[1]: https://lkml.kernel.org/r/1531133549-25806-2-git-send-email-jian.hu@amlogic.com
[2]: https://lkml.kernel.org/r/1531728707-192230-2-git-send-email-jian.hu@amlogic.com
[3]: https://lkml.kernel.org/r/20180717095617.12240-1-jbrunet@baylibre.com
[4]: https://lkml.kernel.org/r/1533890858-113020-1-git-send-email-jian.hu@amlogic.com
[5]: https://lkml.kernel.org/r/1541511349-121152-1-git-send-email-jian.hu@amlogic.com
[6]: https://lkml.kernel.org/r/1543498917-98605-1-git-send-email-jian.hu@amlogic.com
[7]: https://lkml.kernel.org/r/20190201125841.26785-1-jbrunet@baylibre.com
Jerome Brunet (2):
clk: meson: pll: update driver for the g12a
clk: meson: factorise meson64 peripheral clock controller drivers
Jian Hu (2):
dt-bindings: clk: meson: add g12a periph clock controller bindings
clk: meson: g12a: add peripheral clock controller
.../bindings/clock/amlogic,gxbb-clkc.txt | 1 +
drivers/clk/meson/Kconfig | 21 +-
drivers/clk/meson/Makefile | 2 +
drivers/clk/meson/axg.c | 59 +-
drivers/clk/meson/clk-pll.c | 203 +-
drivers/clk/meson/clk-pll.h | 10 +-
drivers/clk/meson/clk-regmap.h | 9 +-
drivers/clk/meson/g12a.c | 2359 +++++++++++++++++
drivers/clk/meson/g12a.h | 175 ++
drivers/clk/meson/gxbb.c | 272 +-
drivers/clk/meson/meson-eeclk.c | 63 +
drivers/clk/meson/meson-eeclk.h | 25 +
include/dt-bindings/clock/g12a-clkc.h | 135 +
13 files changed, 3147 insertions(+), 187 deletions(-)
create mode 100644 drivers/clk/meson/g12a.c
create mode 100644 drivers/clk/meson/g12a.h
create mode 100644 drivers/clk/meson/meson-eeclk.c
create mode 100644 drivers/clk/meson/meson-eeclk.h
create mode 100644 include/dt-bindings/clock/g12a-clkc.h
--
2.20.1
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