linux-kernel - Re: [Part2 PATCH v9 38/38] KVM: X86: Restart the guest when insn

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Message-ID: <CALMp9eTpMm4qpNCUj00qk8CA7BmW-uq4YRwHzKa_GAwON2kgyQ@mail.gmail.com>
Date:   Fri, 1 Feb 2019 12:21:18 -0800
From:   Jim Mattson <jmattson@...gle.com>
To:     Brijesh Singh <brijesh.singh@....com>
Cc:     kvm list <kvm@...r.kernel.org>,
        LKML <linux-kernel@...r.kernel.org>,
        "the arch/x86 maintainers" <x86@...nel.org>,
        Borislav Petkov <bp@...en8.de>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>,
        "H. Peter Anvin" <hpa@...or.com>,
        Paolo Bonzini <pbonzini@...hat.com>,
        Radim Krčmář <rkrcmar@...hat.com>,
        Joerg Roedel <joro@...tes.org>, Borislav Petkov <bp@...e.de>,
        Tom Lendacky <thomas.lendacky@....com>
Subject: Re: [Part2 PATCH v9 38/38] KVM: X86: Restart the guest when insn_len
 is zero and SEV is enabled

On Mon, Dec 4, 2017 at 5:07 PM Brijesh Singh <brijesh.singh@....com> wrote:
>
> On AMD platforms, under certain conditions insn_len may be zero on #NPF.
> This can happen if a guest gets a page-fault on data access but the HW
> table walker is not able to read the instruction page (e.g instruction
> page is not present in memory).
>
> Typically, when insn_len is zero, x86_emulate_instruction() walks the
> guest page table and fetches the instruction bytes from guest memory.
> When SEV is enabled, the guest memory is encrypted with guest-specific
> key hence hypervisor will not able to fetch the instruction bytes.
> In those cases we simply restart the guest.
>
> I have encountered this issue when running kernbench inside the guest.
>
> Cc: Thomas Gleixner <tglx@...utronix.de>
> Cc: Ingo Molnar <mingo@...hat.com>
> Cc: "H. Peter Anvin" <hpa@...or.com>
> Cc: Paolo Bonzini <pbonzini@...hat.com>
> Cc: "Radim Krčmář" <rkrcmar@...hat.com>
> Cc: Joerg Roedel <joro@...tes.org>
> Cc: Borislav Petkov <bp@...e.de>
> Cc: Tom Lendacky <thomas.lendacky@....com>
> Cc: x86@...nel.org
> Cc: kvm@...r.kernel.org
> Cc: linux-kernel@...r.kernel.org
> Signed-off-by: Brijesh Singh <brijesh.singh@....com>
> ---
>  arch/x86/kvm/mmu.c | 10 ++++++++++
>  arch/x86/kvm/svm.c |  6 ++++--
>  2 files changed, 14 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c
> index e5e66e5c6640..d5e5dbd0e5ad 100644
> --- a/arch/x86/kvm/mmu.c
> +++ b/arch/x86/kvm/mmu.c
> @@ -4950,6 +4950,16 @@ int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u64 error_code,
>         if (mmio_info_in_cache(vcpu, cr2, direct))
>                 emulation_type = 0;
>  emulate:
> +       /*
> +        * On AMD platforms, under certain conditions insn_len may be zero on #NPF.
> +        * This can happen if a guest gets a page-fault on data access but the HW
> +        * table walker is not able to read the instruction page (e.g instruction
> +        * page is not present in memory). In those cases we simply restart the
> +        * guest.
> +        */
> +       if (unlikely(insn && !insn_len))
> +               return 1;
> +

How does this work, for instance, with MMIO at CPL3 with SMAP enabled?