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Date: Fri, 1 Feb 2019 21:14:50 -0800
From: Fenghua Yu <fenghua.yu@...el.com>
To: "Thomas Gleixner" <tglx@...utronix.de>,
"Ingo Molnar" <mingo@...hat.com>, "H Peter Anvin" <hpa@...or.com>,
"Dave Hansen" <dave.hansen@...el.com>,
"Ashok Raj" <ashok.raj@...el.com>,
"Peter Zijlstra" <peterz@...radead.org>,
"Michael Chan" <michael.chan@...adcom.com>,
"Ravi V Shankar" <ravi.v.shankar@...el.com>,
"Ricardo Neri" <ricardo.neri@...el.com>
Cc: "linux-kernel" <linux-kernel@...r.kernel.org>,
"x86" <x86@...nel.org>, Fenghua Yu <fenghua.yu@...el.com>
Subject: [PATCH v3 09/10] x86/split_lock: Define #AC for split lock feature
The feature is Linux specific. If the feature is enumerated or
enabled by "setcpuid=ac_split_lock", the bit is set.
Signed-off-by: Fenghua Yu <fenghua.yu@...el.com>
---
arch/x86/include/asm/cpufeatures.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 6d6122524711..125a490e4182 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -221,6 +221,7 @@
#define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */
#define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* "" L1TF workaround PTE inversion */
#define X86_FEATURE_IBRS_ENHANCED ( 7*32+30) /* Enhanced IBRS */
+#define X86_FEATURE_AC_SPLIT_LOCK ( 7*32+31) /* #AC for split lock */
/* Virtualization flags: Linux defined, word 8 */
#define X86_FEATURE_TPR_SHADOW ( 8*32+ 0) /* Intel TPR Shadow */
--
2.7.4
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