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Date:   Sat, 2 Feb 2019 10:25:43 +0800
From:   Zhou Wang <wangzhou1@...ilicon.com>
To:     Herbert Xu <herbert@...dor.apana.org.au>
CC:     "David S . Miller" <davem@...emloft.net>,
        <linux-crypto@...r.kernel.org>, <linuxarm@...wei.com>,
        <linux-kernel@...r.kernel.org>,
        Kenneth Lee <liguozhu@...ilicon.com>,
        Shiju Jose <shiju.jose@...wei.com>,
        Hao Fang <fanghao11@...wei.com>
Subject: Re: [PATCH v2 2/4] crypto: hisilicon: Add queue management driver for
 HiSilicon QM module

On 2019/2/1 23:39, Herbert Xu wrote:
> On Fri, Feb 01, 2019 at 03:15:54PM +0800, Zhou Wang wrote:
>>
>>> Polling in softirq context is unacceptable.  Can't your hardware
>>> send interrupts to signal completion? What is the average speed
>>> of processing a single 1500-byte packet on your hardware?
>>
>> Our hardware supports interrupt. In fact, implementation of compress/decompress
>> interface of crypto_alg in v1 was done using interrupt:
>>
>>  compress/decompress:
>>      send task to hardware
>>      wait task finished(wait_for_completion_timeout)
>>
>>  In irq handler:
>>      complete
>>
>> However, there is get_cpu/put_cpu in scomp, wait and complete in above has to be
>> changed to poll:
>>
>>  compress/decompress:
>>      send task to hardware
>>      check if task is finished
> 
> If your hardware supports interrupts then you should be using
> the acomp interface and not scomp.

In fact, I planned to register to acomp later.

It also makes sense to use scomp if hardware engine is faster than CPU.
So how about registering to scomp firstly, then we register this engine to
acomp later?

Thanks,
Zhou

> 
> Thanks,
> 

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