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Message-ID: <lsq.1549201508.388753594@decadent.org.uk>
Date: Sun, 03 Feb 2019 14:45:08 +0100
From: Ben Hutchings <ben@...adent.org.uk>
To: linux-kernel@...r.kernel.org, stable@...r.kernel.org
CC: akpm@...ux-foundation.org, Denis Kirjanov <kda@...ux-powerpc.org>,
"jgross@...e.com" <jgross@...e.com>,
"KY Srinivasan" <kys@...rosoft.com>,
"akataria@...are.com" <akataria@...are.com>,
"olaf@...fle.de" <olaf@...fle.de>,
"marcelo.cerri@...onical.com" <marcelo.cerri@...onical.com>,
"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"apw@...onical.com" <apw@...onical.com>,
"daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>,
"virtualization@...ts.linux-foundation.org"
<virtualization@...ts.linux-foundation.org>,
"Michael Kelley" <mikelley@...rosoft.com>,
"jasowang@...hat.com" <jasowang@...hat.com>,
"devel@...uxdriverproject.org" <devel@...uxdriverproject.org>,
"vkuznets" <vkuznets@...hat.com>,
"Thomas Gleixner" <tglx@...utronix.de>
Subject: [PATCH 3.16 139/305] clockevents/drivers/i8253: Add support for
PIT shutdown quirk
3.16.63-rc1 review patch. If anyone has any objections, please let me know.
------------------
From: Michael Kelley <mikelley@...rosoft.com>
commit 35b69a420bfb56b7b74cb635ea903db05e357bec upstream.
Add support for platforms where pit_shutdown() doesn't work because of a
quirk in the PIT emulation. On these platforms setting the counter register
to zero causes the PIT to start running again, negating the shutdown.
Provide a global variable that controls whether the counter register is
zero'ed, which platform specific code can override.
Signed-off-by: Michael Kelley <mikelley@...rosoft.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Cc: "gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>
Cc: "devel@...uxdriverproject.org" <devel@...uxdriverproject.org>
Cc: "daniel.lezcano@...aro.org" <daniel.lezcano@...aro.org>
Cc: "virtualization@...ts.linux-foundation.org" <virtualization@...ts.linux-foundation.org>
Cc: "jgross@...e.com" <jgross@...e.com>
Cc: "akataria@...are.com" <akataria@...are.com>
Cc: "olaf@...fle.de" <olaf@...fle.de>
Cc: "apw@...onical.com" <apw@...onical.com>
Cc: vkuznets <vkuznets@...hat.com>
Cc: "jasowang@...hat.com" <jasowang@...hat.com>
Cc: "marcelo.cerri@...onical.com" <marcelo.cerri@...onical.com>
Cc: KY Srinivasan <kys@...rosoft.com>
Link: https://lkml.kernel.org/r/1541303219-11142-2-git-send-email-mikelley@microsoft.com
[bwh: Backported to 3.16:
- Don't use __ro_after_init
- Adjust context, indentation]
Signed-off-by: Ben Hutchings <ben@...adent.org.uk>
---
drivers/clocksource/i8253.c | 14 ++++++++++++--
include/linux/i8253.h | 1 +
2 files changed, 13 insertions(+), 2 deletions(-)
--- a/drivers/clocksource/i8253.c
+++ b/drivers/clocksource/i8253.c
@@ -19,6 +19,13 @@
DEFINE_RAW_SPINLOCK(i8253_lock);
EXPORT_SYMBOL(i8253_lock);
+/*
+ * Handle PIT quirk in pit_shutdown() where zeroing the counter register
+ * restarts the PIT, negating the shutdown. On platforms with the quirk,
+ * platform specific code can set this to false.
+ */
+bool i8253_clear_counter_on_shutdown = true;
+
#ifdef CONFIG_CLKSRC_I8253
/*
* Since the PIT overflows every tick, its not very useful
@@ -123,8 +130,11 @@ static void init_pit_timer(enum clock_ev
if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
evt->mode == CLOCK_EVT_MODE_ONESHOT) {
outb_p(0x30, PIT_MODE);
- outb_p(0, PIT_CH0);
- outb_p(0, PIT_CH0);
+
+ if (i8253_clear_counter_on_shutdown) {
+ outb_p(0, PIT_CH0);
+ outb_p(0, PIT_CH0);
+ }
}
break;
--- a/include/linux/i8253.h
+++ b/include/linux/i8253.h
@@ -21,6 +21,7 @@
#define PIT_LATCH ((PIT_TICK_RATE + HZ/2) / HZ)
extern raw_spinlock_t i8253_lock;
+extern bool i8253_clear_counter_on_shutdown;
extern struct clock_event_device i8253_clockevent;
extern void clockevent_i8253_init(bool oneshot);
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