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Message-ID: <20190204085953.GL4296@vkoul-mobl>
Date:   Mon, 4 Feb 2019 14:29:53 +0530
From:   Vinod Koul <vkoul@...nel.org>
To:     John Stultz <john.stultz@...aro.org>
Cc:     lkml <linux-kernel@...r.kernel.org>, Li Yu <liyu65@...ilicon.com>,
        Dan Williams <dan.j.williams@...el.com>,
        Tanglei Han <hantanglei@...wei.com>,
        Zhuangluan Su <suzhuangluan@...ilicon.com>,
        Ryan Grachek <ryan@...ted.us>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Guodong Xu <guodong.xu@...aro.org>, dmaengine@...r.kernel.org
Subject: Re: [PATCH 5/8 v5] dma: k3dma: Add support for dma-channel-mask

On 24-01-19, 12:24, John Stultz wrote:
> From: Li Yu <liyu65@...ilicon.com>
> 
> Add dma-channel-mask as a property for k3dma, it defines
> available dma channels which a non-secure mode driver can use.
> 
> One sample usage of this is in Hi3660 SoC. DMA channel 0 is
> reserved to lpm3, which is a coprocessor for power management. So
> as a result, any request in kernel (which runs on main processor
> and in non-secure mode) should start from at least channel 1.
> 
> Cc: Dan Williams <dan.j.williams@...el.com>
> Cc: Vinod Koul <vkoul@...nel.org>
> Cc: Tanglei Han <hantanglei@...wei.com>
> Cc: Zhuangluan Su <suzhuangluan@...ilicon.com>
> Cc: Ryan Grachek <ryan@...ted.us>
> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
> Cc: Guodong Xu <guodong.xu@...aro.org>
> Cc: dmaengine@...r.kernel.org
> Signed-off-by: Li Yu <liyu65@...ilicon.com>
> [jstultz: Reworked to use a channel mask]
> Signed-off-by: John Stultz <john.stultz@...aro.org>
> ---
> v3: Rename to hisi-dma-avail-chan
> v4: Rename to dma-channel-mask
> v5: Use BIT(i) instead of (1<<i)
> ---
>  drivers/dma/k3dma.c | 20 +++++++++++++++++++-
>  1 file changed, 19 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/dma/k3dma.c b/drivers/dma/k3dma.c
> index e415c85..294ec64 100644
> --- a/drivers/dma/k3dma.c
> +++ b/drivers/dma/k3dma.c
> @@ -111,6 +111,7 @@ struct k3_dma_dev {
>  	struct dma_pool		*pool;
>  	u32			dma_channels;
>  	u32			dma_requests;
> +	u32			dma_channel_mask;
>  	unsigned int		irq;
>  };
>  
> @@ -319,6 +320,9 @@ static void k3_dma_tasklet(unsigned long arg)
>  	/* check new channel request in d->chan_pending */
>  	spin_lock_irq(&d->lock);
>  	for (pch = 0; pch < d->dma_channels; pch++) {
> +		if (!(d->dma_channel_mask & (1<<pch)))

spaces around <<

> +			continue;
> +
>  		p = &d->phy[pch];
>  
>  		if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
> @@ -336,6 +340,9 @@ static void k3_dma_tasklet(unsigned long arg)
>  	spin_unlock_irq(&d->lock);
>  
>  	for (pch = 0; pch < d->dma_channels; pch++) {
> +		if (!(d->dma_channel_mask & (1<<pch)))

and here :(

> +			continue;
> +
>  		if (pch_alloc & (1 << pch)) {
>  			p = &d->phy[pch];
>  			c = p->vchan;
> @@ -856,6 +863,13 @@ static int k3_dma_probe(struct platform_device *op)
>  				"dma-channels", &d->dma_channels);
>  		of_property_read_u32((&op->dev)->of_node,
>  				"dma-requests", &d->dma_requests);
> +		ret = of_property_read_u32((&op->dev)->of_node,
> +				"dma-channel-mask", &d->dma_channel_mask);
> +		if (ret) {
> +			dev_warn(&op->dev,
> +				 "dma-channel-mask doesn't exist, considering all as available.\n");
> +			d->dma_channel_mask = (u32)~0UL;
> +		}
>  	}
>  
>  	if (!(soc_data->flags & K3_FLAG_NOCLK)) {
> @@ -887,8 +901,12 @@ static int k3_dma_probe(struct platform_device *op)
>  		return -ENOMEM;
>  
>  	for (i = 0; i < d->dma_channels; i++) {
> -		struct k3_dma_phy *p = &d->phy[i];
> +		struct k3_dma_phy *p;
> +
> +		if (!(d->dma_channel_mask & BIT(i)))
> +			continue;
>  
> +		p = &d->phy[i];
>  		p->idx = i;
>  		p->base = d->base + i * 0x40;
>  	}
> -- 
> 2.7.4

-- 
~Vinod

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