[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <20190204151643.0354180d@bbrezillon>
Date: Mon, 4 Feb 2019 15:16:43 +0100
From: Boris Brezillon <bbrezillon@...nel.org>
To: <Tudor.Ambarus@...rochip.com>
Cc: <broonie@...nel.org>, <robh+dt@...nel.org>, <mark.rutland@....com>,
<Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<Ludovic.Desroches@...rochip.com>, <Cyrille.Pitchen@...rochip.com>,
<bugalski.piotr@...il.com>, <linux-spi@...r.kernel.org>,
<devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>
Subject: Re: [PATCH v4 13/13] spi: atmel-quadspi: add support for sam9x60
qspi controller
On Mon, 4 Feb 2019 10:10:21 +0000
<Tudor.Ambarus@...rochip.com> wrote:
> +
> +static void atmel_qspi_sam9x60_write_regs(const struct atmel_qspi *aq,
> + const struct spi_mem_op *op,
> + const struct atmel_qspi_cfg *cfg)
> +{
> + /* Clear pending interrupts */
> + (void)readl_relaxed(aq->regs + QSPI_SR);
> +
> + /* Set QSPI Instruction Frame registers */
> + writel_relaxed(cfg->iar, aq->regs + QSPI_IAR);
> + if (op->data.dir == SPI_MEM_DATA_IN)
> + writel_relaxed(cfg->icr, aq->regs + QSPI_RICR);
> + else
> + writel_relaxed(cfg->icr, aq->regs + QSPI_ICR);
Can you use WICR here (even if ICR == WICR)?
> + writel_relaxed(cfg->ifr, aq->regs + QSPI_IFR);
> +}
Hm, so the only difference we have is the RICR vs ICR reg and the
APBTFRTYP_READ vs SAMA5D2_WRITE_TRSFR bit. Not sure it deserves
creating 2 hooks for that. Can we have something like ->has_ricr in
the caps and then have an if/else block directly in
atmel_qspi_set_cfg()?
Powered by blists - more mailing lists