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Message-ID: <2d1c4c93-6ea9-5a0d-9a36-641fc01b14f5@intel.com>
Date: Mon, 4 Feb 2019 10:41:40 -0800
From: Dave Hansen <dave.hansen@...el.com>
To: Fenghua Yu <fenghua.yu@...el.com>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>, H Peter Anvin <hpa@...or.com>,
Ashok Raj <ashok.raj@...el.com>,
Peter Zijlstra <peterz@...radead.org>,
Michael Chan <michael.chan@...adcom.com>,
Ravi V Shankar <ravi.v.shankar@...el.com>,
Ricardo Neri <ricardo.neri@...el.com>
Cc: linux-kernel <linux-kernel@...r.kernel.org>, x86 <x86@...nel.org>
Subject: Re: [PATCH v3 09/10] x86/split_lock: Define #AC for split lock
feature
On 2/1/19 9:14 PM, Fenghua Yu wrote:
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -221,6 +221,7 @@
> #define X86_FEATURE_ZEN ( 7*32+28) /* "" CPU is AMD family 0x17 (Zen) */
> #define X86_FEATURE_L1TF_PTEINV ( 7*32+29) /* "" L1TF workaround PTE inversion */
> #define X86_FEATURE_IBRS_ENHANCED ( 7*32+30) /* Enhanced IBRS */
> +#define X86_FEATURE_AC_SPLIT_LOCK ( 7*32+31) /* #AC for split lock */
The last time this was posted, we (Intel) promised to go get the proper
(CPUID or MSR-based) enumeration of this feature documented. Did we do
that? If so, where is that documentation?
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