linux-kernel - Re: [PATCH] nvme: Enable acceleration feature of A64FX processor

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Message-ID: <20190205143905.GG22199@localhost.localdomain>
Date:   Tue, 5 Feb 2019 07:39:06 -0700
From:   Keith Busch <keith.busch@...el.com>
To:     Takao Indoh <indou.takao@...itsu.com>
Cc:     Takao Indoh <indou.takao@...fujitsu.com>, axboe@...com, hch@....de,
        sagi@...mberg.me, linux-nvme@...ts.infradead.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] nvme: Enable acceleration feature of A64FX processor

On Tue, Feb 05, 2019 at 09:56:05PM +0900, Takao Indoh wrote:
> On Fri, Feb 01, 2019 at 07:54:14AM -0700, Keith Busch wrote:
> > On Fri, Feb 01, 2019 at 09:46:15PM +0900, Takao Indoh wrote:
> > > From: Takao Indoh <indou.takao@...itsu.com>
> > > 
> > > Fujitsu A64FX processor has a feature to accelerate data transfer of
> > > internal bus by relaxed ordering. It is enabled when the bit 56 of dma
> > > address is set to 1.
> > 
> > Wait, what? RO is a standard PCIe TLP attribute. Why would we need this?
> 
> I should have explained this patch more carefully.
> 
> Standard PCIe devices can use Relaxed Ordering (RO) by setting Attr
> field in the TLP header, however, this mechanism cannot be utilized if
> the device does not support RO feature. Fujitsu A64FX processor has an
> alternate feature to enable RO in its Root Port by setting the bit 56 of
> DMA address. This mechanism enables to utilize RO feature even if the
> device does not support standard PCIe RO.

I think you're better of just purchasing devices that support the
capability per spec rather than with a non-standard work around.