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Message-ID: <20190205154257.29529-1-tudor.ambarus@microchip.com>
Date: Tue, 5 Feb 2019 15:43:07 +0000
From: <Tudor.Ambarus@...rochip.com>
To: <broonie@...nel.org>, <robh+dt@...nel.org>, <mark.rutland@....com>,
<Nicolas.Ferre@...rochip.com>, <alexandre.belloni@...tlin.com>,
<Ludovic.Desroches@...rochip.com>, <bbrezillon@...nel.org>,
<Cyrille.Pitchen@...rochip.com>, <bugalski.piotr@...il.com>
CC: <linux-spi@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>, <linux-mtd@...ts.infradead.org>,
<Tudor.Ambarus@...rochip.com>
Subject: [PATCH v5 00/13] spi: atmel-quadspi: introduce sam9x60 qspi
controller
From: Tudor Ambarus <tudor.ambarus@...rochip.com>
Patches from 1 to 11 are minor fixes or cosmetics.
Patches 12 and 13 introduce the sam9x60 qspi controller.
sam9x60 qspi controller tested with sst26vf064b jedec,spi-nor flash.
Backward compatibility test done on sama5d2 qspi controller and
mx25l25635e jedec,spi-nor flash.
The patches are generated on top of for-next branch.
v5:
- use WICR for sam9x60
- remove ops hooks and introduce caps->has_ricr
- get rid of the cfg struct
- group IO accesses together in atmel_qspi_set_cfg()
v4:
- s/smm/mr, init controller in serial memory mode by default
- drop local variables that kept aq->regs and &pdev->dev, the compiler
should be smart enough to store them in a register
- introduce QSPI_IFR_TFRTYP_MEM
- add comment saying QSPI_IFR_APBTFRTYP_READ is defined in sam9x60
- s/sama5d2_qspi_modes/atmel_qspi_modes, modes are the same both
controllers
- fix kernel doc header
- move comment in function body
- collect R-b tags
v3:
- update smm value when different.
- treat just regular spi transfers when introducing sam9x60 qspi IP.
Mem transfers will be added together with dirmap support.
- reorganize the code and change ops functions pointers to avoid code
duplication.
- rename aq->clk to aq->pclk to indicate that it's a peripheral clock.
- drop unused and NOP transfer macros.
- add Suggested-by tags, reword some commits.
v2:
- cache MR value,
- drop iomem wrappers,
- make "pclk" clock-name mandatory even for sama5d2,
- rework clock handling,
- reorder setting of register values in set_cfg() calls,
- collect R-b tags.
Tudor Ambarus (13):
spi: atmel-quadspi: cache MR value to avoid a write access
spi: atmel-quadspi: order header files inclusion alphabetically
spi: atmel-quadspi: drop wrappers for iomem accesses
spi: atmel-quadspi: fix naming scheme
spi: atmel-quadspi: remove unnecessary cast
spi: atmel-quadspi: return appropriate error code
spi: atmel-quadspi: switch to SPDX license identifiers
spi: atmel-quadspi: rework transfer macros
dt-bindings: spi: atmel-quadspi: update example to new clock binding
dt-bindings: spi: atmel-quadspi: make "pclk" mandatory
spi: atmel-quadspi: add support for named peripheral clock
dt-bindings: spi: atmel-quadspi: QuadSPI driver for Microchip SAM9X60
spi: atmel-quadspi: add support for sam9x60 qspi controller
.../devicetree/bindings/spi/atmel-quadspi.txt | 12 +-
drivers/spi/atmel-quadspi.c | 261 +++++++++++++--------
2 files changed, 175 insertions(+), 98 deletions(-)
--
2.9.5
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