linux-kernel - Re: [PATCH] phy: bcm-sr-pcie: Change operation when PIPEMUX=1

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:   Wed, 6 Feb 2019 17:46:15 +0530
From:   Kishon Vijay Abraham I <kishon@...com>
To:     Scott Branden <scott.branden@...adcom.com>,
        Ray Jui <ray.jui@...adcom.com>
CC:     <linux-kernel@...r.kernel.org>,
        <bcm-kernel-feedback-list@...adcom.com>,
        Qingmin Liu <qingmin.liu@...adcom.com>
Subject: Re: [PATCH] phy: bcm-sr-pcie: Change operation when PIPEMUX=1



On 05/02/19 12:51 AM, Scott Branden wrote:
> Looks good.
> 
> On 2019-02-04 11:07 a.m., Ray Jui wrote:
>> From: Qingmin Liu <qingmin.liu@...adcom.com>
>>
>> When PIPEMIX=1, change the operation from 2x8 EP to 1x8 EP + 1x8 RC.
>>
>> Signed-off-by: Qingmin Liu <qingmin.liu@...adcom.com>
>> Signed-off-by: Ray Jui <ray.jui@...adcom.com>
> Acked-by: Scott Branden <scott.branden@...adcom.com>

merged, thanks.

-Kishon
>> ---
>>   drivers/phy/broadcom/phy-bcm-sr-pcie.c | 4 ++--
>>   1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/drivers/phy/broadcom/phy-bcm-sr-pcie.c
>> b/drivers/phy/broadcom/phy-bcm-sr-pcie.c
>> index c10e95f86de5..96a3af126a78 100644
>> --- a/drivers/phy/broadcom/phy-bcm-sr-pcie.c
>> +++ b/drivers/phy/broadcom/phy-bcm-sr-pcie.c
>> @@ -78,8 +78,8 @@ struct sr_pcie_phy_core {
>>   static const u8 pipemux_table[] = {
>>       /* PIPEMUX = 0, EP 1x16 */
>>       0x00,
>> -    /* PIPEMUX = 1, EP 2x8 */
>> -    0x00,
>> +    /* PIPEMUX = 1, EP 1x8 + RC 1x8, core 7 */
>> +    0x80,
>>       /* PIPEMUX = 2, EP 4x4 */
>>       0x00,
>>       /* PIPEMUX = 3, RC 2x8, cores 0, 7 */