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Message-ID: <87bm3p6ly9.fsf@FE-laptop>
Date: Wed, 06 Feb 2019 15:17:02 +0100
From: Gregory CLEMENT <gregory.clement@...tlin.com>
To: Miquel Raynal <miquel.raynal@...tlin.com>,
Jason Cooper <jason@...edaemon.net>,
Andrew Lunn <andrew@...n.ch>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Bjorn Helgaas <bhelgaas@...gle.com>
Cc: devicetree@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
linux-pci@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
Antoine Tenart <antoine.tenart@...tlin.com>,
Maxime Chevallier <maxime.chevallier@...tlin.com>,
Nadav Haklai <nadavh@...vell.com>,
Miquel Raynal <miquel.raynal@...tlin.com>
Subject: Re: [PATCH v3 13/15] ARM64: dts: marvell: armada-3720-espressobin: declare PCIe PHY
Hi Miquel,
On mar., janv. 08 2019, Miquel Raynal <miquel.raynal@...tlin.com> wrote:
> The PCIe node is wired to the second PHY of the COMPHY IP.
>
> Suggested-by: Grzegorz Jaszczyk <jaz@...ihalf.com>
> Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
Applied to mvebu/dt64
Thanks,
Gregory
> ---
> arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
> index 094994a9c68e..c5c72902c647 100644
> --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
> +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts
> @@ -46,6 +46,7 @@
> /* J9 */
> &pcie0 {
> status = "okay";
> + phys = <&comphy1 0>;
> };
>
> /* J6 */
> --
> 2.19.1
>
--
Gregory Clement, Bootlin
Embedded Linux and Kernel engineering
http://bootlin.com
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