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Message-Id: <20190206033239.3619-7-wens@csie.org>
Date: Wed, 6 Feb 2019 11:32:36 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Maxime Ripard <maxime.ripard@...tlin.com>,
Linus Walleij <linus.walleij@...aro.org>
Cc: Chen-Yu Tsai <wens@...e.org>, linux-arm-kernel@...ts.infradead.org,
linux-gpio@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-sunxi@...glegroups.com
Subject: [PATCH 6/9] ARM: dts: sun9i: Add A80 GMAC gigabit ethernet controller node
The A80 has the same GMAC found on the A31 SoC.
Add a device node, and an alias for it.
Signed-off-by: Chen-Yu Tsai <wens@...e.org>
---
arch/arm/boot/dts/sun9i-a80.dtsi | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm/boot/dts/sun9i-a80.dtsi b/arch/arm/boot/dts/sun9i-a80.dtsi
index 724ca3b850c8..f0c7acf2d0a4 100644
--- a/arch/arm/boot/dts/sun9i-a80.dtsi
+++ b/arch/arm/boot/dts/sun9i-a80.dtsi
@@ -56,6 +56,10 @@
#size-cells = <2>;
interrupt-parent = <&gic>;
+ aliases {
+ ethernet0 = &gmac;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;
@@ -314,6 +318,23 @@
};
};
+ gmac: ethernet@...000 {
+ compatible = "allwinner,sun7i-a20-gmac";
+ reg = <0x00830000 0x1054>;
+ interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "macirq";
+ clocks = <&ccu CLK_BUS_GMAC>, <&gmac_tx_clk>;
+ clock-names = "stmmaceth", "allwinner_gmac_tx";
+ resets = <&ccu RST_BUS_GMAC>;
+ reset-names = "stmmaceth";
+ snps,pbl = <2>;
+ snps,fixed-burst;
+ snps,force_sf_dma_mode;
+ status = "disabled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
ehci0: usb@...000 {
compatible = "allwinner,sun9i-a80-ehci", "generic-ehci";
reg = <0x00a00000 0x100>;
--
2.20.1
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