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Message-ID: <ff55a1e9-0998-685f-2d2c-e6cf522b0988@ti.com>
Date: Fri, 8 Feb 2019 10:16:59 +0530
From: Kishon Vijay Abraham I <kishon@...com>
To: Lorenzo Pieralisi <lorenzo.pieralisi@....com>
CC: Murali Karicheri <m-karicheri2@...com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Jingoo Han <jingoohan1@...il.com>,
Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
<linux-pci@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 6/9] PCI: dwc: Add support to use non default
msi_irq_chip
Hi Lorenzo,
On 07/02/19 10:18 PM, Lorenzo Pieralisi wrote:
> On Thu, Feb 07, 2019 at 04:39:21PM +0530, Kishon Vijay Abraham I wrote:
>> Platforms using Designware IP uses dw_pci_msi_bottom_irq_chip for
>> configuring the MSI controller logic within the Designware IP. However
>> certain platforms like Keystone (K2G) which uses Desingware IP has
>> it's own MSI controller logic. For handling such platforms,
>> the irqchip ops uses msi_irq_ack, msi_set_irq, msi_clear_irq callback
>> functions.
>>
>> Add support to use different msi_irq_chip with default as
>> dw_pci_msi_bottom_irq_chip. This is in preparation to get rid off
>> msi_irq_ack, msi_set_irq, msi_clear_irq and other Keystone specific
>> dw_pcie_host_ops. This will also help to get rid of get_msi_addr and
>> get_msi_data ops.
>>
>> Signed-off-by: Kishon Vijay Abraham I <kishon@...com>
>> ---
>> drivers/pci/controller/dwc/pcie-designware-host.c | 5 ++++-
>> drivers/pci/controller/dwc/pcie-designware.h | 1 +
>> 2 files changed, 5 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
>> index 721d60a5d9e4..042de09b0451 100644
>> --- a/drivers/pci/controller/dwc/pcie-designware-host.c
>> +++ b/drivers/pci/controller/dwc/pcie-designware-host.c
>> @@ -245,7 +245,7 @@ static int dw_pcie_irq_domain_alloc(struct irq_domain *domain,
>>
>> for (i = 0; i < nr_irqs; i++)
>> irq_domain_set_info(domain, virq + i, bit + i,
>> - &dw_pci_msi_bottom_irq_chip,
>> + pp->msi_irq_chip,
>> pp, handle_edge_irq,
>> NULL, NULL);
>>
>> @@ -277,6 +277,9 @@ int dw_pcie_allocate_domains(struct pcie_port *pp)
>> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> struct fwnode_handle *fwnode = of_node_to_fwnode(pci->dev->of_node);
>>
>> + if (!pp->msi_irq_chip)
>> + pp->msi_irq_chip = &dw_pci_msi_bottom_irq_chip;
>
> I think it is better to initialize pp->msi_irq_chip outside
> dw_pcie_allocate_domains(), it makes things clearer.
>
> In:
>
> dw_pcie_host_init() for dwc
>
> or
>
> msi_host_init() for platforms with that hook implemented.
>
> Is there any gotcha I am missing ?
I added here only to avoid breaking "git bisect". Next patch adds
ks_pcie_msi_irq_chip in msi_host_init of keystone. However till then it has to
use dw_pci_msi_bottom_irq_chip. Adding anywhere else in dw_pcie_host_init would
mean msi_irq_chip is uninitialized for keystone.
Maybe I can add that in the commit log and move it to dw_pcie_host_init?
Thanks
Kishon
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