lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CAOMZO5BH1Su=tKD8vV8+-i_0a_4fNDQKbk0q6DX5TZWYezeH9Q@mail.gmail.com>
Date:   Thu, 7 Feb 2019 22:50:28 -0200
From:   Fabio Estevam <festevam@...il.com>
To:     Jonathan Neuschäfer <j.neuschaefer@....net>
Cc:     linux-clk <linux-clk@...r.kernel.org>,
        linux-mmc <linux-mmc@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Stephen Boyd <sboyd@...nel.org>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Adrian Hunter <adrian.hunter@...el.com>,
        NXP Linux Team <linux-imx@....com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Fabio Estevam <fabio.estevam@....com>,
        Shawn Guo <shawnguo@...nel.org>,
        Michael Turquette <mturquette@...libre.com>,
        "moderated list:ARM/FREESCALE IMX / MXC ARM ARCHITECTURE" 
        <linux-arm-kernel@...ts.infradead.org>
Subject: Re: sdhci-esdhc-imx/v5.0-rc5: i.MX50 system hangs when "per" clock is disabled

Hi Jonathan,

On Thu, Feb 7, 2019 at 8:52 PM Jonathan Neuschäfer
<j.neuschaefer@....net> wrote:
>
> Hi,
>
> I'm currently porting mainline Linux to an i.MX507-based board
> (preliminary DT here[1]). Recently I've enabled esdhc1 in the
> devicetree.
>
> However, as soon as the mmc driver (sdhci-esdhc-imx.c) disables clk_per
> in sdhci_esdhc_runtime_suspend[2], the whole system locks up in some way.
> Booting with CONFIG_PM=n "fixes" the problem; commenting out the
> offending line in sdhci_esdhc_runtime_suspend lets the system survive,
> but leaves the MMC controller in an unusable state (of course it's not a
> proper solution anyway).
>
> I tried to compare the CCM's clocks between i.MX50 and i.MX53, but
> unfortunately, the i.MX50 reference manual doesn't have the table called
> "Output clocks from CCM".

Please check Table 5-10. CCM_CCGR3 Gated Clock Mapping to Target
Module from the MX50 Referene Manual.

>
> Does anyone have any ideas or patches that I could try in order to
> narrow the problem further down?

Does the change below help?

--- a/arch/arm/boot/dts/imx50.dtsi
+++ b/arch/arm/boot/dts/imx50.dtsi
@@ -102,7 +102,7 @@
                                        reg = <0x50004000 0x4000>;
                                        interrupts = <1>;
                                        clocks = <&clks
IMX5_CLK_ESDHC1_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks
IMX5_CLK_ESDHC1_IPG_GATE>,
                                                 <&clks
IMX5_CLK_ESDHC1_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;
@@ -114,7 +114,7 @@
                                        reg = <0x50008000 0x4000>;
                                        interrupts = <2>;
                                        clocks = <&clks
IMX5_CLK_ESDHC2_IPG_GATE>,
-                                                <&clks IMX5_CLK_DUMMY>,
+                                                <&clks
IMX5_CLK_ESDHC2_IPG_GATE>,
                                                 <&clks
IMX5_CLK_ESDHC2_PER_GATE>;
                                        clock-names = "ipg", "ahb", "per";
                                        bus-width = <4>;

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ