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Message-ID: <63b27cde-294e-056d-3ac5-3778c27cfb09@linux.intel.com>
Date:   Fri, 8 Feb 2019 08:35:04 -0500
From:   "Liang, Kan" <kan.liang@...ux.intel.com>
To:     Thomas Gleixner <tglx@...utronix.de>
Cc:     Peter Zijlstra <peterz@...radead.org>, acme@...nel.org,
        mingo@...hat.com, linux-kernel@...r.kernel.org, eranian@...gle.com,
        jolsa@...hat.com, namhyung@...nel.org, ak@...ux.intel.com,
        Andy Lutomirski <luto@...capital.net>
Subject: Re: [PATCH V3 01/13] perf/core, x86: Add PERF_SAMPLE_DATA_PAGE_SIZE



On 2/8/2019 5:39 AM, Thomas Gleixner wrote:
> On Thu, 31 Jan 2019, Liang, Kan wrote:
>>>> +u64 perf_get_page_size(u64 virt)
>>>> +{
>>>> +	unsigned long flags;
>>>> +	unsigned int level;
>>>> +	pte_t *pte;
>>>> +
>>>> +	if (!virt)
>>>> +		return 0;
>>>> +
>>>> +	/*
>>>> +	 * Interrupts are disabled, so it prevents any tear down
>>>> +	 * of the page tables.
>>>> +	 * See the comment near struct mmu_table_batch.
>>>> +	 */
>>>> +	local_irq_save(flags);
>>>> +	if (virt >= TASK_SIZE)
>>>> +		pte = lookup_address(virt, &level);
>>>> +	else {
>>>> +		if (current->mm)
>>>> +			pte = lookup_address_in_pgd(pgd_offset(current->mm,
>>>> virt),
>>>> +						    virt, &level);
>>>
>>> Aside from all the missin {}, I'm fairly sure this is broken since this
>>> happens from NMI context. This can interrupt switch_mm() and things like
>>> use_temporary_mm().
>>>
>>> Also; why does this live in the x86 code and not in the generic code?
>>>
>>
>> This is x86 implementation.
>> In generic code, there is a __weak function. I'll make it clear in the change
>> log in v4.
> 
> No, instead of hiding it in the changelog, split the patch into two:
> 
>   #1 Adding the core stuff including the weak function
> 
>   #2 Adding the x86 implementation.
> 

Thanks for the comments. I will do it in V5.

Thanks,
Kan

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