linux-kernel - [tip:perf/core] perf vendor events intel: Fix Load_Miss_Real

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Message-ID: <tip-2d08f87fe7a2e4d74dc8b0eb645737d83dd932a9@git.kernel.org>
Date:   Sat, 9 Feb 2019 04:56:51 -0800
From:   tip-bot for William Cohen <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     linux-kernel@...r.kernel.org, ak@...ux.intel.com, acme@...hat.com,
        jolsa@...hat.com, hpa@...or.com, tglx@...utronix.de,
        peterz@...radead.org, mingo@...nel.org, namhyung@...nel.org,
        wcohen@...hat.com, alexander.shishkin@...ux.intel.com
Subject: [tip:perf/core] perf vendor events intel: Fix
 Load_Miss_Real_Latency on CLX

Commit-ID:  2d08f87fe7a2e4d74dc8b0eb645737d83dd932a9
Gitweb:     https://git.kernel.org/tip/2d08f87fe7a2e4d74dc8b0eb645737d83dd932a9
Author:     William Cohen <wcohen@...hat.com>
AuthorDate: Tue, 29 Jan 2019 12:05:36 -0500
Committer:  Arnaldo Carvalho de Melo <acme@...hat.com>
CommitDate: Wed, 6 Feb 2019 10:00:40 -0300

perf vendor events intel: Fix Load_Miss_Real_Latency on CLX

Fix incorrect event names for the Load_Miss_Real_Latency metric for
Cascadelake server in the same manner as commit 91b2b97025 for SKL/SKX.

Signed-off-by: William Cohen <wcohen@...hat.com>
Reviewed-by: Andi Kleen <ak@...ux.intel.com>
Cc: Alexander Shishkin <alexander.shishkin@...ux.intel.com>
Cc: Jiri Olsa <jolsa@...hat.com>
Cc: Namhyung Kim <namhyung@...nel.org>
Cc: Peter Zijlstra <peterz@...radead.org>
Link: http://lkml.kernel.org/r/20190129170536.22510-1-wcohen@redhat.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@...hat.com>
---
 tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json b/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json
index 36c903faed0b..71e9737f4614 100644
--- a/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json
+++ b/tools/perf/pmu-events/arch/x86/cascadelakex/clx-metrics.json
@@ -73,7 +73,7 @@
     },
     {
         "BriefDescription": "Actual Average Latency for L1 data-cache miss demand loads",
-        "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS_PS + MEM_LOAD_RETIRED.FB_HIT_PS )",
+        "MetricExpr": "L1D_PEND_MISS.PENDING / ( MEM_LOAD_RETIRED.L1_MISS + MEM_LOAD_RETIRED.FB_HIT )",
         "MetricGroup": "Memory_Bound;Memory_Lat",
         "MetricName": "Load_Miss_Real_Latency"
     },