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Message-Id: <37f573797e18fc22f8f78d0a62550b6d5e460a8d.1549875778.git.mesihkilinc@gmail.com>
Date:   Mon, 11 Feb 2019 12:21:12 +0300
From:   Mesih Kilinc <mesihkilinc@...il.com>
To:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
        linux-sunxi@...glegroups.com
Cc:     Mesih Kilinc <mesihkilinc@...il.com>,
        Maxime Ripard <maxime.ripard@...e-electrons.com>,
        Chen-Yu Tsai <wens@...e.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Icenowy Zheng <icenowy@...c.io>,
        Rob Herring <robh+dt@...nel.org>
Subject: [PATCH 6/7] ARM: dts: suniv: Add pinmux for SPI0 and SPI1 of F1C100s

PC0~PC4 is pin group for SPI0. PA0~PA4 is pin group for SPI1.
Add device tree nodes for this groups.

Signed-off-by: Mesih Kilinc <mesihkilinc@...il.com>
---
 arch/arm/boot/dts/suniv-f1c100s.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi
index 1b332d9..a92a411 100644
--- a/arch/arm/boot/dts/suniv-f1c100s.dtsi
+++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi
@@ -96,6 +96,16 @@
 				pins = "PE0", "PE1";
 				function = "uart0";
 			};
+
+			spi0_pc_pins: spi0-pc-pins {
+				pins = "PC0", "PC1", "PC2", "PC3";
+				function = "spi0";
+			};
+
+			spi1_pa_pins: spi1-pa-pins {
+				pins = "PA0", "PA1", "PA2", "PA3";
+				function = "spi1";
+			};
 		};
 
 		timer@...0c00 {
-- 
2.7.4

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