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Message-ID: <40d67487-3881-2e3b-c2cd-424333b0abc5@linux.intel.com>
Date: Mon, 11 Feb 2019 11:24:22 -0800
From: sathyanarayanan kuppuswamy
<sathyanarayanan.kuppuswamy@...ux.intel.com>
To: "Raj, Ashok" <ashok.raj@...el.com>, Sinan Kaya <Okaya@...nel.org>
Cc: bhelgaas@...gle.com, joro@...tes.org, dwmw2@...radead.org,
linux-pci@...r.kernel.org, iommu@...ts.linux-foundation.org,
linux-kernel@...r.kernel.org,
Jacob Pan <jacob.jun.pan@...ux.intel.com>,
Keith Busch <keith.busch@...el.com>
Subject: Re: [PATCH v1 1/2] PCI: ATS: Add function to check ATS page aligned
request status.
On 2/11/19 11:15 AM, Raj, Ashok wrote:
> On Fri, Feb 08, 2019 at 11:49:55PM -0500, Sinan Kaya wrote:
>> On 2/8/2019 8:02 PM, sathyanarayanan kuppuswamy wrote:
>>>> This means that you should probably have some kind of version check
>>>> here.
>>> There is no version field in ATS v1.0 spec. Also, If I follow the history
>>> log in PCI spec, I think ATS if first added at v1.2. Please correct me if
>>> I am wrong.
>> v1.2 was incorporated into PCIe spec at that time. However, the ATS spec
>> is old and there could be some HW that could claim to be ATS compatible.
>> I know AMD GPUs declare ATS capability.
> It seems rather odd we have to check for ATS version.
>
> I always assumed unspecified bits (Reserved) must be 0. We only check
> this if ATS is enabled, and this particular bit wasn't given away for another
> feature.
>
> Is it really required to check for ATS version before consuming this?
If the version check is required then, it needs to be added before
reading "Invalidate Queue Depth" value as well.
>
>
>> See this ECN
>>
>> https://composter.com.ua/documents/ats_r1.1_26Jan09.pdf
>>
>> You need to validate the version field from ATS capability header to be
>> 1 before reading this register.
>>
>> See Table 5-1: ATS Extended Capability Header
--
Sathyanarayanan Kuppuswamy
Linux kernel developer
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