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Message-ID: <alpine.DEB.2.21.1902111419300.3197@nanos.tec.linutronix.de>
Date:   Mon, 11 Feb 2019 14:20:23 +0100 (CET)
From:   Thomas Gleixner <tglx@...utronix.de>
To:     Aubrey Li <aubrey.li@...el.com>
cc:     mingo@...hat.com, peterz@...radead.org, hpa@...or.com,
        ak@...ux.intel.com, tim.c.chen@...ux.intel.com,
        dave.hansen@...el.com, arjan@...ux.intel.com,
        linux-kernel@...r.kernel.org, Aubrey Li <aubrey.li@...ux.intel.com>
Subject: Re: [PATCH v8 1/3] x86/fpu: track AVX-512 usage of tasks

On Fri, 18 Jan 2019, Aubrey Li wrote:

> User space tools which do automated task placement need information
> about AVX-512 usage of tasks, because AVX-512 usage could cause core
> turbo frequency drop and impact the running task on the sibling CPU.
> 
> The XSAVE hardware structure has bits that indicate when valid state
> is present in registers unique to AVX-512 use.  Use these bits to
> indicate when AVX-512 has been in use and add per-task AVX-512 state
> timestamp tracking to context switch.
> 
> Well-written AVX-512 applications are expected to clear the AVX-512
> state when not actively using AVX-512 registers, so the tracking
> mechanism is imprecise and can theoretically miss AVX-512 usage during
> context switch. But it has been measured to be precise enough to be
> useful under real-world workloads like tensorflow and linpack.
> 
> If higher precision is required, suggest user space tools to use the
> PMU-based mechanisms in combination.
> 
> Signed-off-by: Aubrey Li <aubrey.li@...ux.intel.com>

Reviewed-by: Thomas Gleixner <tglx@...utronix.de>

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