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Date: Mon, 11 Feb 2019 14:58:52 +0100 From: Simon Horman <horms+renesas@...ge.net.au> To: Geert Uytterhoeven <geert+renesas@...der.be> Cc: Magnus Damm <magnus.damm@...il.com>, linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org, Fabrizio Castro <fabrizio.castro@...renesas.com>, Biju Das <biju.das@...renesas.com>, Andrew Morton <akpm@...ux-foundation.org>, linux-kernel@...r.kernel.org, Simon Horman <horms+renesas@...ge.net.au> Subject: [PATCH v5 0/6] clk: renesas: r8a77990, r8a774c0: Add Z2 clock Hi, this series adds the Z2 clock as a clock with both a fixed and variable divisor with a parent of PLL0 to the CPG-MSSR drivers for the R-Car E3 (r8a77990) and RZ/G2E (r8a774c0) SoCs. In order to do so this series: 1. Parameterise Z and Z2 clock fixed divisor in shared Gen-3 CPG driver code to allow fixed divisors other than 2 - the E3 Z2 clock has a fixed divisor of 4 2. Parameterise offset of Z and Z2 clock control bits - the offsets on E3 differ to other R-Car Gen 3 SoCs 3. Support Z and Z2 clocks with high frequency parents. The parent of the E3 Z2 clock, PLL0, is 4.8GHz and thus when expressed in HZ must be treated as a 64bit value. 4. Actually add the Z2 clocks Changes since v4 * Separate patch to add DIV64_U64_ROUND_CLOSEST helper * Accumulate review tags Changes since v3 ---------------- * Add and use DIV64_U64_ROUND_CLOSEST in the patch to allow high frequency parents. This corrects the patch for 32bit platforms. * Accumulate review and testing tags. Changes since v2 ---------------- * Parameterise control bit offset rather than using a quirk * Revised RZ/G2E patch - I was confused and updating the file for the wrong part number Testing Overview ---------------- v4 of this patchset was tested on Ebisu-4D/E3 with top of renesas-devel-20190207-v5.0-rc5. This allowed CPUFreq to be successfully exercised. v4 of the patchset was also tested for regressions Salvator-X/M3-W ES1.0. There is no overall code-change between v4 and v5 of this patchset. This v3 of this patchset was been independently tested RZ/G2E. It is not expected that v5 will have any behavioural differences on that (or any other 64bit) platform. Patches List by Author ---------------------- Simon Horman (4): clk: renesas: rcar-gen3: Parameterise Z and Z2 clock offset math64: New DIV64_U64_ROUND_CLOSEST helper clk: renesas: rcar-gen3: Support Z and Z2 clocks with high frequency parents clk: renesas: r8a774c0: Add Z2 clock Takeshi Kihara (2): clk: renesas: rcar-gen3: Parameterise Z and Z2 clock fixed divisor clk: renesas: r8a77990: Add Z2 clock drivers/clk/renesas/r8a774a1-cpg-mssr.c | 4 ++-- drivers/clk/renesas/r8a774c0-cpg-mssr.c | 1 + drivers/clk/renesas/r8a7795-cpg-mssr.c | 5 +++-- drivers/clk/renesas/r8a7796-cpg-mssr.c | 5 +++-- drivers/clk/renesas/r8a77965-cpg-mssr.c | 2 +- drivers/clk/renesas/r8a77990-cpg-mssr.c | 1 + drivers/clk/renesas/rcar-gen3-cpg.c | 27 +++++++++++++-------------- drivers/clk/renesas/rcar-gen3-cpg.h | 4 ++++ include/linux/math64.h | 13 +++++++++++++ 9 files changed, 41 insertions(+), 21 deletions(-) -- 2.11.0
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