lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite for Android: free password hash cracker in your pocket
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <CALMp9eRV8KmA1KQf3C8GX3p5voBvLMspR-XRSb4BLmZhLKQLKA@mail.gmail.com>
Date:   Tue, 12 Feb 2019 10:00:59 -0800
From:   Jim Mattson <jmattson@...gle.com>
To:     Paolo Bonzini <pbonzini@...hat.com>
Cc:     Vitaly Kuznetsov <vkuznets@...hat.com>,
        kvm list <kvm@...r.kernel.org>,
        Radim Krčmář <rkrcmar@...hat.com>,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86/kvm/nVMX: read from MSR_IA32_VMX_PROCBASED_CTLS2 only
 when it is available

On Tue, Feb 12, 2019 at 6:16 AM Paolo Bonzini <pbonzini@...hat.com> wrote:
>
> On 07/02/19 22:17, Jim Mattson wrote:
> >> SDM says MSR_IA32_VMX_PROCBASED_CTLS2 is only available "If
> >> (CPUID.01H:ECX.[5] && IA32_VMX_PROCBASED_CTLS[63])". It was found that
> >> some old cpus (namely "Intel(R) Core(TM)2 CPU 6600 @ 2.40GHz (family: 0x6,
> >> model: 0xf, stepping: 0x6") don't have it. Add the missing check.
> >>
> >> Reported-by: Zdenek Kaspar <zkaspar82@...il.com>
> >> Tested-by: Zdenek Kaspar <zkaspar82@...il.com>
> >> Signed-off-by: Vitaly Kuznetsov <vkuznets@...hat.com>
> >
> > Reviewed-by: Jim Mattson <jmattson@...gle.com>
>
> Queued, thanks.
>
> Paolo

Alternatively, rdmsr could be changed to rdmsr_safe.

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ