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Message-Id: <1549969812-22502-1-git-send-email-atish.patra@wdc.com>
Date: Tue, 12 Feb 2019 03:10:04 -0800
From: Atish Patra <atish.patra@....com>
To: linux-riscv@...ts.infradead.org
Cc: Atish Patra <atish.patra@....com>,
Alan Kao <alankao@...estech.com>,
Albert Ou <aou@...s.berkeley.edu>,
Andreas Schwab <schwab@...e.de>,
Anup Patel <anup@...infault.org>,
Daniel Lezcano <daniel.lezcano@...aro.org>,
Dmitriy Cherkasov <dmitriy@...-tech.org>,
Jason Cooper <jason@...edaemon.net>,
Johan Hovold <johan@...nel.org>, linux-kernel@...r.kernel.org,
Marc Zyngier <marc.zyngier@....com>,
Palmer Dabbelt <palmer@...ive.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Rob Herring <robh@...nel.org>,
Thomas Gleixner <tglx@...utronix.de>
Subject: [v4 PATCH 0/8] Various SMP related fixes
The existing upstream kernel doesn't boot for non-smp configuration.
This patch series address various issues with non-smp configurations.
The patch series is based on 5.0-rc5 + Johan's below mentioned patch
series. Tested on both QEMU and HiFive Unleashed board using both
OpenSBI & BBL.
https://lore.kernel.org/lkml/20190118140308.9599-1-johan@kernel.org/
Changes from v3->v4
1. Fixed commit text length issues.
2. Updated hwcap patch to use common capabilities of all harts.
3. Rebased on Johan's patch series.
Changes from v2->v3
1. Fixed spurious white space.
2. Added lockdep for smpboot completion variable.
2. Added a sanity check for hwcap.
Changes from v1->v2
1. Move the cpuid to hartd id map to smp.c from setup.c
2. Split 3rd patch into several small patches based on
logical grouping.
3. Added a new patch that fixes an issue in hwcap query.
4. Changed the title of the patch series.
Atish Patra (8):
RISC-V: Do not wait indefinitely in __cpu_up
RISC-V: Move cpuid to hartid mapping to SMP.
RISC-V: Remove NR_CPUs check during hartid search from DT
RISC-V: Allow hartid-to-cpuid function to fail.
RISC-V: Compare cpuid with NR_CPUS before mapping.
clocksource/drivers/riscv: Add required checks during clock source
init
irqchip/irq-sifive-plic: Check and continue in case of an invalid
cpuid.
RISC-V: Assign hwcap as per comman capabilities.
arch/riscv/include/asm/smp.h | 18 ++++++++++++-----
arch/riscv/kernel/cpu.c | 4 ----
arch/riscv/kernel/cpufeature.c | 41 +++++++++++++++++++++------------------
arch/riscv/kernel/setup.c | 9 ---------
arch/riscv/kernel/smp.c | 10 +++++++++-
arch/riscv/kernel/smpboot.c | 20 ++++++++++++++++---
drivers/clocksource/timer-riscv.c | 23 +++++++++++++++++++---
drivers/irqchip/irq-sifive-plic.c | 5 +++++
8 files changed, 86 insertions(+), 44 deletions(-)
--
2.7.4
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