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Message-Id: <20190214193236.7504-3-jagan@amarulasolutions.com>
Date: Fri, 15 Feb 2019 01:02:29 +0530
From: Jagan Teki <jagan@...rulasolutions.com>
To: Maxime Ripard <maxime.ripard@...tlin.com>,
David Airlie <airlied@...ux.ie>,
Daniel Vetter <daniel@...ll.ch>, Chen-Yu Tsai <wens@...e.org>
Cc: dri-devel@...ts.freedesktop.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-amarula@...rulasolutions.com,
Michael Trimarchi <michael@...rulasolutions.com>,
Jagan Teki <jagan@...rulasolutions.com>
Subject: [PATCH v8 02/10] drm/sun4i: sun6i_mipi_dsi: Support instruction loop selection
Instruction loop selection would require before writing
loop number registers, so enable idle, LP11 bits on
loop selection register.
Reference code available in BSP (from linux-sunxi/
drivers/video/sunxi/disp2/disp/de/lowlevel_sun50iw1/de_dsi.c)
(dsi_dev[sel]->dsi_inst_loop_sel.dwval = 2<<(4*DSI_INST_ID_LP11) |
3<<(4*DSI_INST_ID_DLY);
Signed-off-by: Jagan Teki <jagan@...rulasolutions.com>
Tested-by: Merlijn Wajer <merlijn@...zup.org>
---
drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
index 8184fbcfd9fd..1a0707468121 100644
--- a/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
+++ b/drivers/gpu/drm/sun4i/sun6i_mipi_dsi.c
@@ -421,6 +421,9 @@ static void sun6i_dsi_setup_inst_loop(struct sun6i_dsi *dsi,
{
u16 delay = sun6i_dsi_setup_inst_delay(dsi, mode);
+ regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_SEL_REG,
+ DSI_INST_ID_HSC << (4 * DSI_INST_ID_LP11) |
+ DSI_INST_ID_HSD << (4 * DSI_INST_ID_DLY));
regmap_write(dsi->regs, SUN6I_DSI_INST_LOOP_NUM_REG(0),
SUN6I_DSI_INST_LOOP_NUM_N0(50 - 1) |
SUN6I_DSI_INST_LOOP_NUM_N1(delay));
--
2.18.0.321.gffc6fa0e3
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