linux-kernel - Re: [PATCH v6 1/2] pwm: sifive: Add DT documentation for SiFive PWM Controller

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Thu, 14 Feb 2019 13:37:59 +0530
From:   Yash Shah <yash.shah@...ive.com>
To:     Rob Herring <robh@...nel.org>
Cc:     Palmer Dabbelt <palmer@...ive.com>, linux-pwm@...r.kernel.org,
        linux-riscv@...ts.infradead.org,
        Thierry Reding <thierry.reding@...il.com>,
        mark.rutland@....com, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org,
        Sachin Ghadi <sachin.ghadi@...ive.com>,
        Paul Walmsley <paul.walmsley@...ive.com>
Subject: Re: [PATCH v6 1/2] pwm: sifive: Add DT documentation for SiFive PWM Controller

On Thu, Feb 14, 2019 at 2:07 AM Rob Herring <robh@...nel.org> wrote:
>
> On Wed, Feb 13, 2019 at 02:56:17PM +0530, Yash Shah wrote:
> > DT documentation for PWM controller added.
> >
> > Signed-off-by: Wesley W. Terpstra <wesley@...ive.com>
> > [Atish: Compatible string update]
> > Signed-off-by: Atish Patra <atish.patra@....com>
> > Signed-off-by: Yash Shah <yash.shah@...ive.com>
> > ---
> >  .../devicetree/bindings/pwm/pwm-sifive.txt         | 30 ++++++++++++++++++++++
> >  1 file changed, 30 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.txt
> >
> > diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt
> > new file mode 100644
> > index 0000000..3b9c64c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt
> > @@ -0,0 +1,30 @@
> > +SiFive PWM controller
> > +
> > +Unlike most other PWM controllers, the SiFive PWM controller currently only
> > +supports one period for all channels in the PWM. All PWMs need to run at
> > +the same period. The period also has significant restrictions on the values
> > +it can achieve, which the driver rounds to the nearest achievable period.
> > +PWM RTL that corresponds to the IP block version numbers can be found
> > +here:
> > +
> > +https://github.com/sifive/sifive-blocks/tree/master/src/main/scala/devices/pwm
> > +
> > +Required properties:
> > +- compatible: Should be "sifive,$socname-pwm" and "sifive,pwmX".
> > +  Please refer to sifive-blocks-ip-versioning.txt for details.
>
> Please specify what soc and IP version are used. Is sifive,pwm10 valid?

Does the below description seem fine?

should be "sifive,<chip>-pwm" and "sifive,pwm<version>".
Supported compatible strings are:
"sifive,fu540-c000-pwm" for the SiFive PWM v0 as
integrated onto the SiFive FU540 chip, and "sifive,pwm0"
for the SiFive PWM v0 IP block with no chip integration
tweaks. Please refer to sifive-blocks-ip-versioning.txt for details

>
> > +- reg: physical base address and length of the controller's registers
> > +- clocks: Should contain a clock identifier for the PWM's parent clock.
> > +- #pwm-cells: Should be 3. See pwm.txt in this directory
> > +  for a description of the cell format.
> > +- interrupts: one interrupt per PWM channel
> > +
> > +Examples:
> > +
> > +pwm:  pwm@...20000 {
> > +     compatible = "sifive,fu540-c000-pwm", "sifive,pwm0";
> > +     reg = <0x0 0x10020000 0x0 0x1000>;
> > +     clocks = <&tlclk>;
> > +     interrupt-parent = <&plic>;
> > +     interrupts = <42 43 44 45>;
> > +     #pwm-cells = <3>;
> > +};
> > --
> > 1.9.1
> >

Thanks for the comment