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Message-ID: <20190214104047.1173-7-gabriel.fernandez@st.com>
Date: Thu, 14 Feb 2019 11:40:46 +0100
From: <gabriel.fernandez@...com>
To: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...com>
CC: <linux-clk@...r.kernel.org>,
<linux-stm32@...md-mailman.stormreply.com>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-kernel@...r.kernel.org>,
Gabriel Fernandez <gabriel.fernandez@...com>
Subject: [PATCH v2 6/7] clk: stm32mp1: remove unnecessary CLK_DIVIDER_ALLOW_ZERO flag
From: Gabriel Fernandez <gabriel.fernandez@...com>
The divisor of ethptp_k and ck_hse_rtc clocks is: 'value register
plus one'.
Then CLK_DIVIDER_ALLOW_ZERO flag has no effect and is useless here.
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@...com>
---
drivers/clk/clk-stm32mp1.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/clk/clk-stm32mp1.c b/drivers/clk/clk-stm32mp1.c
index 8958bc11ff05..ca987632564e 100644
--- a/drivers/clk/clk-stm32mp1.c
+++ b/drivers/clk/clk-stm32mp1.c
@@ -1959,11 +1959,10 @@ static const struct clock_config stm32mp1_clock_cfg[] = {
CLK_SET_RATE_NO_REPARENT,
_NO_GATE,
_MMUX(M_ETHCK),
- _DIV(RCC_ETHCKSELR, 4, 4, CLK_DIVIDER_ALLOW_ZERO, NULL)),
+ _DIV(RCC_ETHCKSELR, 4, 4, 0, NULL)),
/* RTC clock */
- DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7,
- CLK_DIVIDER_ALLOW_ZERO),
+ DIV(NO_ID, "ck_hse_rtc", "ck_hse", 0, RCC_RTCDIVR, 0, 7, 0),
COMPOSITE(RTC, "ck_rtc", rtc_src, CLK_OPS_PARENT_ENABLE |
CLK_SET_RATE_PARENT,
--
2.17.0
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